Programmable extended compression mask for dynamic trace
AssigneeTexas Instruments Incorporated
InventorsLewis Nardini, Manisha Agarwala, John M. Johnsen
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Abstract
This invention provides trace address compression by comparing respective bytes of a current trace address with a stored comparison address. Only the least significant bytes of the current trace address that do not match the comparison address or are less significant than any section of the current trace address that does not match the comparison address are transmitted. This sometimes reduces the amount of data that needs to be transmitted. The comparison address is specified by a central processing unit via a memory mapped register write operation.
Claims20
A trace compression apparatus, comprising:
- a first input receiving a current trace address of a sequence of trace addresses;
- a second input receiving a comparison address provided separately from said sequence of trace addresses;
- a plurality of section comparators coupled to said first and second inputs, each of said section comparators receiving a section of said comparison address and a corresponding section of said current trace address, and determining whether said received sections match;
- and
- a trace stream controller coupled to said first input to receive said current trace address, and also coupled to said plurality of section comparators, said trace stream controller outputting only sections of the current trace address that do not match respectively corresponding sections of the comparison address or are less significant than a section of the current trace address that does not match a respectively corresponding section of the comparison address.
An integrated circuit apparatus, comprising:
- a data processor;
- and
- a trace compression apparatus coupled to said data processor, including a first input receiving a current trace address of a sequence of addresses traced from operation of said data processor, a second input receiving a comparison address provided separately from said sequence of traced addresses, and a plurality of section comparators coupled to said first and second inputs, each of said section comparators receiving a section of said comparison address and a corresponding section of said current trace address, and determining whether said received sections match;
- said trace compression apparatus including a trace stream controller coupled to said first input to receive said current trace address, and also coupled to said plurality of section comparators, said trace stream controller outputting only sections of the current trace address that do not match respectively corresponding sections of the comparison address or are less significant than a section of the current trace address that does not match a respectively corresponding section of the comparison address.
Dependencies are inferred from the claim text.