Variable signal delaying circuit, quadrature frequency converter and radio frequency tuner

A quadrature frequency converter comprising:

• in-phase (I) and quadrature (Q) signal paths wherein at least one of the signal paths includes a variable signal delaying circuit for providing a variable delay between an input signal and an output signal, said delaying circuit comprising:
• an analog delay line having a control input for controlling said variable delay;
• a detector for comparing said input and output signals to provide an output signal representing an actual delay provided by said delay line;
• a digital pulse generator for generating a plurality of digital signals representing a plurality of different delay lines delays;
• at least one comparator for forming error signals representing differences between said output signal of said detector and said digital signals of said pulse generator;
• and
• a controller having a first mode of operation, wherein said controller supplies a delay command signal to said control input of said delay line, monitors said error signals and selects one of said digital signals which corresponds to a smallest of said error signals, and a second mode of operation, wherein said controller supplies said error signal corresponding to said selected digital signal as a delay correction signal to said control input of said delay line.

A radio frequency tuner comprising:

• a quadrature frequency converter having in-phase and quadrature signal paths, at least one of which comprises a variable signal delaying circuit for providing a variable delay between an input signal and an output signal, said delaying circuit comprising:
• an analog delay line having a control input for controlling said variable delay;
• a detector for comparing said input and output signals to provide an output signal representing an actual delay provided by said delay line;
• a digital pulse generator for generating a plurality of digital signals representing a plurality of different delay line delays;
• at least one comparator for forming error signals representing differences between said output signal of said detector and said digital signals of said pulse generator;
• and
• a controller having a first mode of operation, wherein said controller supplies a delay command signal to said control input of said delay line, monitors said error signals and selects one of said digital signals which corresponds to a smallest of said error signals, and a second mode of operation, wherein said controller supplies said error signal corresponding to said selected digital signal as a delay correction signal to said control input of said delay line.