Decoding method and apparatus
AssigneeMarvell International Ltd.
InventorsYungping Hsu, Nelson Xu, Ricky Cheung
Life of this patent
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Abstract
A decoder comprises an equalizer that receives a modulated signal comprising a plurality of symbols including a first symbol defined by a first number of chips. A subsymbol processor that generates a subsymbol waveform after receiving a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol. The second number is less than the first number, and wherein the equalizer equalizes the modulated signal using the subsymbol waveform.
Claims34
A decoder, comprising:
- an equalizer that receives a modulated signal comprising a plurality of symbols including a first symbol defined by a first number of chips;
- and
- a subsymbol processor that generates a subsymbol waveform after receiving a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol with the subsymbol processor,
- wherein the second number is less than the first number, and wherein the equalizer equalizes the modulated signal using the subsymbol waveform.
A transceiver, comprising:
- an equalizer that receives a modulated signal comprising a plurality of symbols including a first symbol defined by a first number of chips;
- and
- a subsymbol processor that generates a subsymbol waveform after receiving a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol with the subsymbol processor,
- wherein the second number is less than the first number and wherein the equalizer equalizes the modulated signal using the subsymbol waveform.
A decoder, comprising:
- an equalizer that receives a modulated signal including a Barker encoded symbol defined by a first number of chips;
- and
- a subsymbol processor that generates a decoded waveform upon receipt of a second number of chips of the symbol and before at least one of receiving, decoding, and deciding the first number of chips of the symbol with the subsymbol processor,
- wherein the equalizer equalizes the modulated signal using the decoded waveform and wherein the first number is less than the second number.
A decoder comprising:
- an equalizer that receives a modulated signal including a received symbol defined by a first number of chips;
- a demodulation unit comprising:
- a decoder that decodes the received symbol after receiving the first number of chips defining the received symbol;
- and
- partial correlation logic that generates a decoded subsymbol based on a second number of chips of the received symbol received by the equalizer and before at least one of receiving, decoding, and deciding the first number of chips of the received symbol, wherein the second number is less than the first number;
- and
- a remodulation unit that generates a subsymbol waveform corresponding to the decoded subsymbol,
- wherein the equalizer equalizes the remodulated signal using the subsymbol waveform.
Dependencies are inferred from the claim text.