Nitride semiconductor device and method for fabricating the same
AssigneePanasonic Corporation
InventorsYoshiaki Hasegawa, Akihiko Ishibashi, Toshiya Yokogawa
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Abstract
A nitride semiconductor device 100 according to the present invention includes: an n-GaN substrate 1; a semiconductor multilayer structure, which has been formed on the principal surface of the n-GaN substrate 1 and which includes a p-type region and an n-type region; a p-electrode 32, which makes contact with a portion of the p-type region included in the semiconductor multilayer structure; and an n-electrode 34, which is arranged on the bottom surface of the substrate 1. The bottom surface of the substrate 1 includes a roughened region 40a and a flattened region 40b. And the n-electrode 34 covers the roughened region 40a at least partially.
Claims20
A nitride semiconductor device comprising:
- a nitride-based semiconductor substrate containing an n-type dopant and having a principal surface and a bottom surface;
- a semiconductor multilayer structure formed on the principal surface of the semiconductor substrate, the semiconductor multilayer structure including a p-type region and an n-type region;
- a p-electrode being in contact with a portion of the p-type region included in the semiconductor multilayer structure;
- and
- an n-electrode arranged on the bottom surface of the semiconductor substrate,
- wherein the bottom surface of the semiconductor substrate includes a flattened region and a roughened region, and
- wherein the n-electrode covers the roughened region at least partially.
A method for fabricating a nitride semiconductor device, the method comprising the steps of:
- providing a nitride-based semiconductor substrate containing an n-type dopant and having a principal surface and a bottom surface;
- forming a semiconductor multilayer structure, including a p-type region and an n-type region, on the principal surface of the semiconductor substrate;
- forming a p-electrode on the p-type region that is included in the semiconductor multilayer structure;
- and
- forming an n-electrode on the bottom surface of the semiconductor substrate that includes a nitrogen plane, wherein the method further includes the steps of:
- defining a flattened region and a roughened region on the bottom surface of the semiconductor substrate before the n-electrode is formed there;
- and
- cleaving the semiconductor substrate such that a cleaved surface runs through the flattened region after the n-electrode has been formed.
Dependencies are inferred from the claim text.