Method and apparatus for detecting and managing loss of alignment in a virtually concatenated group
AssigneeIntel Corporation
InventorsSoowan Suh, Jing Ling, Juan-Carlos Calderon, Rodrigo Gonzalez
Life of this patent
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Abstract
A method and apparatus for determining a loss of alignment defect in a communications network employing virtually concatenated payloads is provided. The method and apparatus comprise performing specific evaluations and assessments of conditions under normal conditions as well as evaluations and assessments under LCAS conditions where additional members may be added using the LCAS ADD state.
Claims26
A method for providing a loss of alignment defect indication in a destination device capable of processing virtually concatenated payload members, the method comprising:
- for a received virtually concatenated payload member:
- determining whether a difference between a write address for the received virtually concatenated payload member and a read address for all virtually concatenated payload members is greater than a size of an alignment buffer storing the virtually concatenated payload members;
- and
- assessing whether a difference between a maximum write address for all virtually concatenated payload members plus a threshold value and the write address for the virtually concatenated payload member is greater than the size of the alignment buffer storing the virtually concatenated payload members;
- and
- performing additional evaluations when the destination device provides an ability to add at least one additional member beyond the received virtually concatenated payload member, one additional evaluation including:
- performing a first evaluation of whether a difference between the write address for the received virtually concatenated payload member and the read address for all virtually concatenated payload members is greater than a size of the alignment buffer storing the virtually concatenated payload members minus a small value.
A method for providing a loss of alignment defect indication in a device capable of processing virtually concatenated payload groups, the method comprising:
- for a received member:
- determining whether a difference between a write address for the received member and a read address for all payload members is greater than a size of an alignment buffer;
- and
- assessing whether a difference between a maximum write address for all members plus a threshold value and the write address for the member is greater than the size of the alignment buffer, wherein a valid response to at least one of the determining and assessing results in the loss of alignment defect indication, and
- performing additional evaluations when at least one additional member can be added beyond the received member, wherein one additional evaluation comprises:
- considering whether a difference between a write address for the additional member and the minimum write address for all members minus the threshold value is greater than the size of the alignment buffer storing the members minus a small value.
A processor for processing a loss of alignment defect, comprising:
- for a received member:
- means for determining, for the received member, whether a difference between a write address for the received member and a read address for all payload members is greater than the size an alignment buffer;
- and
- means for assessing whether a difference between a maximum write address for all members plus a threshold value and a write address for the member is greater than the size of the alignment buffer, wherein a valid response to at least one of the determining means and assessing means results in the loss of alignment defect indication, and
- means for performing additional evaluations when at least one additional member can be added beyond the received member, wherein the means for performing one additional evaluation comprises:
- means for considering whether a difference between the write address for the member and the minimum write address for all members minus the threshold value is greater than the size of the alignment buffer storing the members minus a small value.
A system comprising:
- a physical layer interface;
- a framer comprising:
- for a received member:
- means for determining, for the received member, whether a difference between a write address for the received member and a read address for all payload members is greater than a size of an alignment buffer;
- and
- means for assessing whether a difference between a maximum write address for all members plus a threshold value and the write address for the member is greater than the size of the alignment buffer;
- and
- means for performing additional evaluations when at least one additional member can be added beyond the received member, wherein the means for performing additional evaluation includes:
- means for considering whether a difference between a write address for the additional member and a minimum write address for all members minus the threshold value is greater than the size of the alignment buffer storing the members minus a small value;
- a network processor;
- and
- a second interface to at least provide intercommunication between the framer and the network processor.
Dependencies are inferred from the claim text.