Semiconductor integrated circuit device

A semiconductor integrated circuit device, comprising:

• a sense amplifier circuit that is connected to a power supply, outputs currents from a first current supply terminal and a second current supply terminal, and outputs a first sense signal from a first signal terminal and a second sense signal, which is equivalent to said first sense signal inverted, from a second signal terminal according to a voltage drop due to output of the currents;
• a first variable resistor element that is connected to said first current supply terminal of said sense amplifier circuit at a first end, which is one end thereof, and has a resistance that increases when a current of a predetermined value or greater flows in a first direction between said first end and a second end, which is the other end thereof, and decreases when a current of a predetermined value or greater flows in a second direction, which is opposite to said first direction, between said first end and said second end;
• a second variable resistor element that is connected to said second current supply terminal of said sense amplifier circuit at a third end, which is one end thereof, and to the second end of said first variable resistor element at a fourth end, which is the other end thereof, and has a resistance that increases when a current of a predetermined value or greater flows in said second between said third end and said fourth end and decreases when a current of a predetermined value or greater flows in said first direction between said third end and said fourth end;
• a current path switching circuit that has a first current path extending between a first write path terminal connected to said first end and the ground, a second current path extending between a second write path terminal connected to said third end and said ground, and a third current path extending between a point of connection of said second end and said fourth end and said ground;
• and
• an SR flip flop that is connected to said first signal terminal at a first input terminal and to said second signal terminal at a second input terminal and outputs a first output signal from a first output terminal and a second output signal, which is equivalent to said first output signal inverted, from a second output terminal according to the state of the first sense signal and the second sense signal input thereto,
• wherein said current path switching circuit
• blocks said third current path and limits one of the current flowing through said first current path and the current flowing through said second current path according to a data signal in a normal operation mode, and
• blocks said first current path and said second current path and makes said third current path conductive in a read mode, in which data corresponding to the relationship between the magnitudes of the resistances of said first variable resistor element and said second variable resistor element is read after said power supply is turned off and then turned on again in said normal operation mode.

A semiconductor integrated circuit device, comprising:

• a first variable resistor element that has a resistance that increases when a current of a predetermined value or greater flows in a first direction and decreases when a current of a predetermined value or greater flows in a second direction, which is opposite to said first direction;
• a second variable resistor element that has a resistance that increases when a current of a predetermined value or greater flows in said second direction and decreases when a current of a predetermined value or greater flows in said first;
• and
• a current path switching circuit that supplies said current to said first variable resistor element and said second variable resistor element from a power supply by switching between current paths connected to said first variable resistor element and said second variable resistor element according to whether a normal operation mode or a read mode,
• wherein said power supply is turned off and then turned on again in said normal operation mode, and in this state, data corresponding to the relationship between the magnitudes of the resistances of said first variable resistor element and said second variable resistor element is read in said read mode.