Semiconductor memory device having a precharge voltage supply circuit capable of reducing leakage current between a bit line and a word line in a power-down mode
AssigneeHynix Semiconductor Inc.
InventorMi Hyun Hwang
Life of this patent
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Abstract
A precharge voltage supply circuit and a semiconductor memory device using the same are described. The precharge voltage supply circuit includes a first voltage supplier configured to reduce a precharge voltage and supply the reduced precharge voltage in response to a power down mode signal that is activated in a power down mode, a second voltage supplier configured to supply a power voltage in a predetermined section from a point of time when exiting the power down mode, and a third voltage supplier configured to supply the precharge voltage after a lapse of the predetermined section.
Claims23
A precharge voltage supply circuit, comprising:
- a first voltage supplier configured to reduce a precharge voltage and supply the reduced precharge voltage in response to a power down mode signal that is activated in a power down mode;
- a second voltage supplier configured to supply a power voltage in a predetermined section from a point of time when exiting the power down mode;
- and
- a third voltage supplier configured to supply the precharge voltage after a lapse of the predetermined section.
A semiconductor memory device, comprising:
- a precharge voltage supply circuit configured to supply a first voltage having a first level in a power down mode, supply a second voltage having a second level in a predetermined section from a point of time when exiting the power down mode, and supply a third voltage having a third level after a lapse of the predetermined section;
- and
- a precharge circuit configured to precharge a bit line and a complementary bit line with a voltage supplied from the precharge voltage supply circuit in response to an enable signal.
A semiconductor memory device, comprising:
- a first voltage supplier configured to reduce a precharge voltage and supply the reduced precharge voltage as a first voltage having a first level in response to a power down mode signal that is activated in a power down mode;
- a second voltage supplier configured to supply a power voltage as a second voltage having a second level in a predetermined section from a point of time when exiting the power down mode;
- and
- a third voltage supplier configured to supply the precharge voltage as a third voltage having a third level after a lapse of the predetermined section;
- and
- a precharge unit configured to precharge a bit line and a complementary bit line with voltages supplied from the first through third voltage suppliers in response to an enable signal.
Dependencies are inferred from the claim text.