US 7,606,071 B2 · Compensating source voltage drop in non-volatile storage

Abstract

A source line bias error caused by a voltage drop in a source line of a non-volatile memory device during a read or verify operation is addressed. In one approach, a body bias is applied to a substrate of the non-volatile memory device by coupling the substrate to a source voltage or a voltage which is a function of the source voltage. In another approach, a control gate voltage and/or drain voltage, e.g., bit line voltage, are compensated by referencing them to a voltage which is based on the source voltage instead of to ground. Various combinations of these approaches can be used as well. During other operations, such as programming, erase-verify and sensing of negative threshold voltages, the source line bias error is not present, so there is no need for a bias or compensation. A forward body bias can also be compensated.

Claims24

Dependent claims

A method for operating a non-volatile storage system, comprising:

performing a first operation on at least one non-volatile storage element in a set of non-volatile storage elements, the first operation comprises at least one of a read operation and a verify operation, and the set of non-volatile storage elements is formed, at least in part, on a substrate;
and
during the first operation, biasing the substrate according to a first voltage which is based on a voltage of a source which is associated with the at least one non-volatile storage element.

Dependencies are inferred from the claim text.

Compensating source voltage drop in non-volatile storage

Life of this patent

Compensating source voltage drop in non-volatile storage

Life of this patent

Abstract

Claims24