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US 7,606,060 B2Granted
Eight transistor SRAM cell with improved stability requiring only one word line
AssigneeInternational Business Machines Corporation
InventorsYuen H. Chan, William V. Huott, Donald W. Plass
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Abstract
An SRAM cell that is accessed by a single word line and separate access transistors for read and write operations. A pair of write bit line transfer devices provide respectively access to the right and left sides of cross coupled pull-up, pull-down transistor pairs for a write operation, and a single read bit line transistor in series with the word line transistor, when selected, reads the content of the cell.
Claims2
A static random access memory comprising in combination:
- a plurality of bi-stable memory cells arranged in rows and columns;
- a pair of write bit lines common to each memory cell in a column;
- a single pre-charged read bit line common to each memory cell in a column;
- each cell including a pair of write data field effect transistors respectively connecting said each cell in column to said pair of write bit lines, a gate of each of said pair connected respectively to said pair of write bit lines for writing data into each cell;
- a single read data field effect transistor connecting said each cell to said read bit line, with its gate coupled to a node of said each cell in a column for reading data from said cell;
- a single field effect transistor connected to said pair of write data field effect transistors and said read data field effect transistor with its gate coupled to a single word line to control both read access and write access to said each cell.
3 more elements
Dependencies are inferred from the claim text.