Three-dimensional programmable resistance memory device with a read/write circuit stacked under a memory cell array

A programmable resistance memory device comprising:

• a semiconductor substrate;
• at least one cell array, formed above said semiconductor substrate, which comprises a plurality of bit lines arranged in parallel with each other, a plurality of word lines arranged in parallel with each other in such a direction as crossing said bit lines, and memory cells connected between the bit lines and the word lines at cross points of the bit lines and word lines, each said memory cell having a stack structure of a programmable resistance element and an access element, said programmable resistance element storing a high resistance state or a low resistance state in a non-volatile manner, said access element having a resistance value at applying voltages V2 and V3 greater than resistance values at applying voltages V1 and V4 (where V4>V3>V2>V1);
• and
• a read/write circuit formed on said semiconductor substrate as underlying said cell array and connected to the bit lines and word lines through vertical wirings for data reading and data writing in communication with said cell array.

A programmable resistance memory device comprising:

• a semiconductor substrate;
• at least one cell array, formed above said semiconductor substrate, which comprises a plurality of bit lines arranged in parallel with each other, a plurality of word lines arranged in parallel with each other in a direction crossing said bit lines, and memory cells connected between the bit lines and the word lines at cross points of the bit lines and word lines, each said memory cell having a stack structure of a programmable resistance element and an access element, said programmable resistance element is applied one of a positive voltage and a negative voltage to change a resistance state from high to low, is applied the other one of the positive voltage and the negative voltage to change the resistance state from low to high and storing the high resistance state or the low resistance state in a non-volatile manner, said access element having a resistance value in an off-state that is ten times or more as high as that in a select state;
• and
• a read/write circuit formed on said semiconductor substrate as underlying said cell array and connected to the bit lines and word lines through vertical wirings for data reading and data writing in communication with said cell array.