Digitally corrected SAR converter including a correction DAC
AssigneeAnalog Devices, Inc.
InventorChristopher Peter Hurrell
Life of this patent
Estimating the term…
Abstract
An analog to digital converter having improved differential non-linearity is provided. The converter has a memory which is used to look up the actual weight or a weight error corresponding to the bits that have been kept as part of the SAR process to form an output correction value A part of this, for example a residue (the part following the decimal point in a decimal representation) is used to drive a correction DAC which causes a correction to be applied to the trial value presented to a comparator used by the ADC.
Claims27
An analog to digital converter comprising:
- a successive approximation engine which develops and keeps weights of bits determined during successive bit trials of a successive approximation conversion;
- a conversion corrector arranged to perform digital and analog correction of the analog to digital converter;
- and
- a correction digital to analog converter in communication with the successive approximation engine;
- wherein during a bit trial of an analog to digital conversion the conversion corrector forms a digital conversion corrector output value representing actual weights of the bits kept during the successive approximation conversion and a value-constrained representation of the conversion corrector output value is provided as a correction value to the correction digital to analog converter, so as to modify an analog signal presented to a comparator within the successive approximation engine for a subsequent bit trial so as to improve differential non-linearity of the converter.
A method of performing an analog to digital conversion comprising the steps of:
- a. using a successive approximation converter to perform at least one bit trial as part of a successive approximation conversion;
- b. forming a digital conversion corrector output value taking account of discrepancies of actual bit weights in the successive approximation converter from an ideal value thereof;
- c. using a value constrained representation of the conversion corrector output to form an analog correction which is applied to the successive approximation converter so as to reduce differential non-linearity errors within the successive approximation converter;
- and
- d. continuing with the successive approximation conversion.
A method of performing an analog to digital conversion comprising the steps of:
- a. performing a plurality of bit trials as part of a successive approximation conversion;
- b. digitally determining the actual weight resulting from the bit trials, and calculating a residue;
- c. using the residue to form an analog correction which is applied to the analog to digital converter so as to modify a bit trial value within the analog to digital converter;
- and
- d. completing the successive approximation conversion.
An analog to digital converter comprising:
- a successive approximation engine having a comparator therein;
- a conversion corrector;
- and
- a correction digital to analog converter in communication with the successive approximation engine;
- wherein during an analog to digital conversion the conversion corrector forms a digital conversion corrector output value and a portion of the conversion corrector output value is provided as an analog correction value to the correction digital to analog converter, and an output of the correction digital to analog converter is provided to an input of the comparator.
An analog to digital converter comprising:
- a successive approximation engine having a digital to analog converter therein having an output provided to a comparator;
- a conversion corrector;
- and
- a correction digital to analog converter in communication with the successive approximation engine;
- wherein during an analog to digital conversion the conversion corrector forms a digital conversion corrector output value and a portion of the conversion corrector output value is provided as an analog correction value to the correction digital to analog converter, and an output of the correction digital to analog converter is connected to the output of the digital to analog converter of the successive approximation engine so as to modify the signal presented to the comparator, and thereby reduce dynamic non-linearity of the analog to digital converter.
An analog to digital converter comprising a successive approximation engine, and further including conversion corrector comprising a memory holding representations of actual bit weights such that errors in bit weights can be corrected in a digital fashion, and further including a correction digital to analog converter for applying an analog bit weight correction based on a bit weight error as determined by the conversion corrector.
An analog to digital converter comprising:
- a successive approximation engine;
- a conversion corrector;
- and
- a correction digital to analog converter in communication with the successive approximation engine;
- wherein during an analog to digital conversion the conversion corrector forms a digital conversion corrector output value and a residue portion of the conversion corrector output value is provided as a correction value to the correction digital to analog converter, the residue portion further comprising an integer part of the conversion corrector output value, said integer part being constrained to lie within a predetermined range of values.
An analog to digital converter comprising:
- a successive approximation engine;
- a conversion corrector;
- a first switched capacitor array for presenting trial values during the successive approximation conversion process;
- and
- a correction digital to analog converter in communication with the successive approximation engine, the correction digital to analog converter being formed as a plurality of switched capacitors in a further array in communication with the first switched capacitor array;
- wherein during an analog to digital conversion the conversion corrector forms a conversion corrector output value and portion of the conversion corrector output value is provided as a correction value to the correction digital to analog converter.
Dependencies are inferred from the claim text.