Flash analog-to-digital converter
AssigneeNXP B.V.
InventorsMarcel Pelgrom, Atul Katoch, Maarten Vertregt
Life of this patent
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Abstract
A flash analog-to-digital converter comprises a resistive string powered by a reference voltage source for providing a set of equidistant reference voltages and a set of comparators for comparing the analog input signal with the reference voltages. A set of switches are arranged and controlled to perform an algorithm for mitigating the influence of mismatches between the components. The switches are arranged between the reference voltage source and the resistive string so that switches in the reference inputs to the comparators are avoided. The resistive string is preferably circular. The converter can handle differential signals.
Claims7
A flash analog-to-digital converter for converting an analog input signal to a digital output code that is representative of the input signal, said analog-to-digital converter comprising a resistive string of substantially equal valued resistors and powered by a reference voltage source for providing a plurality of equidistant reference voltages, a set of comparators for comparing the analog input signal with said plurality of reference voltages, an encoder receiving the result of the set of comparators and deriving therefrom the digital output code and a switching circuit arranged and controlled to perform a mismatch mitigating algorithm, characterized in that the switching circuit is arranged between said reference voltage source and the resistive string to switch the reference voltage source at different clock cycles across different parts of the string in a systematic manner, wherein each of said parts comprises a fixed number of resistors.
A flash analog-to-digital converter for converting an analog input signal to a digital output code that is representative of the input signal, said analog-to-digital converter comprising a circular resistive string of substantially equal valued resistors and powered by a reference voltage source for providing a plurality of equidistant reference voltages, a set of comparators for comparing the analog input signal with said plurality of reference voltages, an encoder receiving the result of the set of comparators and deriving therefrom the digital output code and a switching circuit arranged and controlled to perform a mismatch mitigating algorithm, characterized in that the switching circuit is arranged between said reference voltage source and the resistive string to switch the reference voltage source at different clock cycles across different parts of the string, wherein each of said parts comprises a fixed number of resistors.
A flash analog-to-digital converter for converting an analog input signal to a digital output code that is representative of the input signal, said analog-to-digital converter comprising a linear resistive string of substantially equal valued resistors and powered by a reference voltage source for providing a plurality of equidistant reference voltages, a set of comparators for comparing the analog input signal with said plurality of reference voltages, an encoder receiving the result of the set of comparators and deriving therefrom the digital output code and switching means arranged and controlled to perform a mismatch mitigating algorithm, characterized in that the switching means are arranged between said reference voltage source and the resistive string to switch the reference voltage source at different clock cycles across different parts of the string, in a systematic manner wherein each of said parts comprises a fixed number of resistors.
A flash analog-to-digital converter for converting an analog input signal to a digital output code that is representative of the input signal, said analog-to-digital converter comprising a resistive string of substantially equal valued resistors and powered by a reference voltage source for providing a plurality of equidistant reference voltages, a set of comparators for comparing the analog input signal with said plurality of reference voltages, an encoder receiving the result of the set of comparators and deriving therefrom the digital output code and switching means arranged and controlled to perform a mismatch mitigating algorithm, characterized in that the switching means are arranged between said reference voltage source and the resistive string to switch the reference voltage source at different clock cycles across different parts of the string, in a non-arbitrary manner wherein each of said parts comprises a fixed number of resistors.
Dependencies are inferred from the claim text.