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US 7,605,737 B2Granted
Data encoding in a clocked data interface
AssigneeTexas Instruments Incorporated
InventorsRobert F. Payne, Richard M. Prentice
Life of this patent
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Abstract
One embodiment of the present invention includes a data transmission system. The system comprises a data transmitter that provides a plurality of data bits over at least one data line. The data transmitter comprises a clock that provides a clock signal associated with timing for latching the plurality of data bits and a data encoder configured to encode error data associated with the data transmission system in the clock signal.
Claims18
A data transmission system comprising:
- a data transmitter that provides a plurality of data bits over at least one data line, the data transmitter comprising:
- a clock that provides a clock signal associated with timing for latching the plurality of data bits;
- and
- a data encoder configured to encode error data associated with the data transmission system in the clock signal;
- wherein the clock signal is configured to define a beginning of a data frame associated with the plurality of data bits based on a rising-edge of the clock signal, and wherein the data receiver comprises one of a phase-locked loop and a delay-locked loop configured to provide a plurality of delayed rising-edges of the clock signal to consecutively latch the plurality of data bits within the data frame from the at least one data line.
2 more elements
A method for encoding data in a clocked digital interface, the method comprising:
- converting an analog signal into a first set of digital data;
- encoding a second set of digital data into a data synchronization signal in a frame signal configured to define a beginning of a data frame based on a rising-edge of the frame signal;
- transmitting a plurality of digital data signals associated with the first digital data and the data synchronization signal across a respective plurality of conductors to a data receiver.
A data transmission system comprising:
- means for transmitting data arranged in a data frame in a plurality of digital data signals;
- means for encoding additional data in a frame signal, the frame signal being configured to define a beginning of the data frame;
- means for latching data from the plurality of digital data signals based on a clock signal and the frame signal;
- and
- means for decoding the additional data from the frame signal based on the clock signal.
2 more elements
Dependencies are inferred from the claim text.