Signal processor with a signal strength detection circuit that is coupled to a loop of an analog to digital converter

Abstract

A signal processing circuit has an analog to digital converter (31) for providing a digital signal to a processor (15) from an analog input signal that is susceptible to variations in signal power, e.g. from a radio front end (12). The device has a variable gain amplifier (13) controlled by a gain control signal based on detected signal strength. The analog to digital converter has a loop comprising a loop filter for processing the input signal. A signal strength detection circuit (32) is provided for generating the gain control signal, which signal strength detection circuit has loop signal detector for detecting the signal strength from the loop. Hence a received signal strength indicator RSSI is directly coupled to the analog to digital converter (31), avoiding the delay of signal strength detection in the digital processor.

Dependencies are inferred from the claim text.