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US 7,605,668 B2Granted
Delay stage with controllably variable capacitive load
AssigneeIntel Corporation
InventorsEyal Fayneh, Ernest Knoll
Life of this patent
Estimating the term…
Abstract
Disclosed herein are embodiments of controllably variable capacitor loads that may be used with delay stages or other elements, for example, in a voltage controlled oscillator.
Claims11
An integrated circuit, comprising:
- a VCO to generate a clock with a clock frequency, the VCO comprising a controllably variable capacitive load to control the clock frequency in response to a control signal and a temperature compensation signal, the controllably variable capacitive load comprising a first load section with a capacitance that is controllably variable in response to the control signal and a second load section with a capacitance that is controllably variable in response to the temperature compensation signal.
An integrated circuit comprising:
- a delay stage having an output;
- a first controllably variable capacitor circuit coupled between the output and a first supply reference;
- and
- a second controllably variable capacitor circuit coupled between the output and a second supply reference, the first and second controllably variable capacitor circuits comprising at least one MOS capacitor, and the second controllably variable capacitor circuit providing a fine tune load capacitance adjustment and being controlled by a temperature compensation signal to control its capacitance.
1 more element
A computer system, comprising:
- (a) a microprocessor comprising a VCO having a plurality of inverter stages, wherein at least one stage has an output, a first controllably variable capacitor circuit coupled between the output and a first supply reference, and a second controllably variable capacitor circuit coupled between the output and a second supply reference, wherein the first and second controllably variable capacitor circuits comprise at least one MOS capacitor, the first controllably variable capacitor circuit providing a fine tune load capacitance adjustment and the second controllably variable capacitor circuit controlled by a temperature compensation signal to control its capacitance;
- (b) an antenna;
- and
- (c) a wireless interface coupled to the microprocessor and to the antenna to communicatively link the microprocessor to a wireless network.
1 more element
Dependencies are inferred from the claim text.