Resistively loaded single stage differential amplifier having zero volt common mode input
AssigneeCavium Networks, Inc.
InventorScott Meninger
Life of this patent
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Abstract
A resistively folded single stage differential amplifier capable of accommodating a low input common mode without impacting the performance of a bias current source, while also providing a high input impedance to allow for the use of the linear termination resistors. The differential amplifier provides an amplified output signal with a common mode referenced to an upper bound of an input power supply. The differential amplifier includes an input sub-stage and a transistor sub-stage resistively folding the input sub-stage.
Claims16
A differential amplifier comprising:
- an input sub-stage configured to accommodate a zero volt common mode input and provide a high input impedance;
- and
- a transistor sub-stage configured to resistively fold the input sub-stage forming a single stage using a resistive load, the resistive load configured to provide an output signal with a common mode referenced to an upper bound of an input power supply, the output signal having a non-inverting output and an inverting output.
A method of amplification comprising:
- receiving a zero volt common mode input signal while providing an amplifier high input impedance;
- and
- outputting an amplified output signal, with a common mode referenced to an upper bound of an input power supply, via a transistor sub-stage resistively folding an input sub-stage using a resistive load, the output signal having a non-inverting output and an inverting output.
A differential amplifier comprising:
- an input sub-stage comprising;
- an input pair of p-channel transistors configured to accommodate a zero volt common mode input and provide a high input impedance;
- and
- a third transistor configured to supply a bias current;
- a transistor sub-stage resistively folding the input sub-stage forming a single stage using a resistive load, the transistor sub-stage further comprising:
- a first set of n-channel MOS transistors configured to receive the bias current through the resistive load;
- and
- a second set of n-channel MOS transistors configured to supply a second bias current, where the first and second set of n-channel MOS transistors are further configured to provide an output signal with a common mode referenced to an upper bound of an input power supply and the output signal directly affected by the input and having a non-inverting output and an inverting output.
A differential amplifier comprising:
- means for accommodating a zero volt common mode input and providing a high input impedance;
- and
- means for resistively folding using a resistive load configured to provide an output signal with a common mode referenced to an upper bound of an input power supply, the output signal having a non-inverting output and an inverting output.
Dependencies are inferred from the claim text.