Level shift circuit which improved the blake down voltage
AssigneeKabushiki Kaisha Toshiba
InventorHiroshi Maejima
Life of this patent
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AssigneeKabushiki Kaisha Toshiba
InventorHiroshi Maejima
Estimating the term…
A gate and the other end of the current path of first and second transistors are cross-connected. A third transistor is inserted to the other end of the current path of the first transistor, and a gate is supplied with a constant voltage, and further, one end of the current path and well are connected. A fourth transistor is inserted to the other end of the current path of the second transistor, and a gate is supplied with a constant voltage, and further, one end of the current path and well are connected. Fifth and sixth transistors are connected to the other end of the current path of the third and fourth transistors, and a gate is complementarily supplied with an input signal. Seventh and eighth transistors are connected to a back gate (well) of the third and fourth transistors, and a gate is complementarily supplied with an output signal.
A level shift circuit comprising:
A level shift circuit comprising:
A bias circuit comprising:
Dependencies are inferred from the claim text.