Stacked chip assembly with encapsulant layer

A microelectronic subassembly comprising:

• a dielectric substrate having a top surface being a major surface, a bottom surface remote from the top surface, the top surface including a first region and at least one peripheral region extending beyond the first region;
• a microelectronic element having a major surface confronting the first region of the top surface of the dielectric substrate, the microelectronic element having peripheral edges extending away from the major surface of the microelectronic element;
• a plurality of leads electrically connected to the microelectronic element having outer ends overlying the at least one peripheral region of the substrate beyond at least one of the peripheral edges of the microelectronic element;
• vertical conductors electrically connected with the outer ends of the leads and projecting upwardly above the at least one peripheral region of the top surface;
• and
• an encapsulant layer provided over one of the surfaces of the substrate and extending continuously from at least the peripheral edges of the microelectronic element to surround the vertical conductors for stiffening the substrate at the at least one peripheral region of the top surface of the substrate, wherein the encapsulant layer has at least one edge at the least one peripheral region of the substrate and a top surface that extends from the at least one edge toward the microelectronic element, and wherein at least one of the vertical conductors is accessible at the top surface of the encapsulant layer.

A microelectronic assembly including a plurality of microelectronic subassemblies, each subassembly comprising:

• a substrate having a top surface being a major surface, the top surface including a first region and at least one peripheral region extending beyond the first region;
• a microelectronic element having a major surface confronting the first region of the top surface of the dielectric substrate, the microelectronic element having peripheral edges extending away from the major surface of the microelectronic element;
• a plurality of leads electrically connected to the microelectronic element having outer ends overlying the at least one peripheral region of the substrate beyond at least one of the peripheral edges of the microelectronic element;
• vertical conductors electrically connected with the outer ends of the leads and projecting upwardly above the at least one peripheral region of the top surface;
• and
• an encapsulant layer provided over a surface of the substrate and extending continuously from at least the peripheral edges of the microelectronic element to surround the vertical conductors for stiffening the substrate at the at least one peripheral region of the top surface of the substrate, wherein the vertical conductors at the at least one peripheral region of the top surface project above a top surface of the encapsulant layer and wherein the microelectronic subassemblies are stacked one a top another and electrically connected through the vertical conductors.