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AssigneeInternational Business Machines Corporation
InventorsBruce B. Doris, Gregory Costrini, Oleg Gluschenkov, Meikei Ieong, Nakgeuon Seong
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The present invention relates to a semiconductor device structure that includes at least one SRAM cell formed in a substrate. Such SRAM cell comprises two pull-up transistors, two pull-down transistors, and two pass-gate transistors. The pull-down transistors and the pass-gate transistors are substantially similar in channel widths and have substantially similar source-drain doping concentrations, while the SRAM cell has a beta ratio of at least 1.5. The substrate preferably comprises a hybrid substrate with at two isolated sets of regions, while carrier mobility in these two sets of regions differentiates by a factor of at least about 1.5. More preferably, the pull-down transistors of the SRAM cell are formed in one set of regions, and the pass-gate transistors are formed in the other set of regions, so that current flow in the pull-down transistors is larger than that in the pass-gate transistors.
A semiconductor device structure comprising at least one SRAM cell located in a hybrid substrate having a first portion with a first crystallographic orientation region and a second crystallographic region, wherein said at least one SRAM cell comprises at least two pull-up transistors, two pull-down transistors, and two pass-gate transistors, wherein the pull-down transistors are present in the first portion of the hybrid substrate having the first crystallographic orientation region that is connected through an active region that is in direct physical contact to the second crystallographic orientation region in which the pass-gate transistors are present, the first crystallographic orientation region having an upper surface coplanar with an upper surface of the second crystallographic orientation region and said first crystallographic region and said second crystallographic region comprise substrate materials of different composition, wherein the at least two pull-down transistors and the at least two pass-gate transistors are substantially similar in channel widths and have substantially similar source-drain doping concentrations, and wherein said at least one SRAM cell has a beta ratio of at least about 1.5.
A semiconductor device structure comprising at least one SRAM cell located in a substrate, wherein said at least one SRAM cell comprises at least two pull-up transistors, two pull-down transistors, and two pass-gate transistors, wherein said substrate comprises a hybrid crystal orientation substrate having a first crystallographic orientation region that is connected through an active region that is in direct physical contact to a second crystallographic orientation region, the first crystallographic orientation region having an upper surface that is coplanar with an upper surface of the second crystallographic orientation region, and said first crystallographic region and said second crystallographic region comprise substrate materials of different composition, wherein the two pull-down transistors are located in the first crystallographic orientation region, and the two pass-gate transistors are located in the second crystallographic orientation region, and wherein current carriers in the pull-down transistors have a higher mobility than those in the pass-gate transistors.
Dependencies are inferred from the claim text.