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US 7,605,443 B2Granted
Semiconductor substrate manufacturing method and semiconductor device manufacturing method, and semiconductor substrate and semiconductor device manufactured by the methods
AssigneeNEC Corporation
InventorAtsushi Ogura
Life of this patent
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Abstract
The present invention relates to a method of manufacturing a semiconductor substrate, which enables a semiconductor device to have high speed operating characteristics and high performance characteristics such as lower electrical power consumption, and a method of manufacturing a semiconductor device including a method of manufacturing the semiconductor substrate thereof in a process, as well as to a semiconductor substrate manufactured by the method of manufacturing the same and a semiconductor device manufactured using the semiconductor substrate.
Claims103
A method of manufacturing a semiconductor substrate, comprising:
- selectively implanting ions into a predetermined region in a substrate, the implanted ions, in turn, forming a plurality of micro-cavities in said predetermined region;
- and
- giving heat treatment to the substrate, thereby, after discharge of said implanted ions outside of said substrate as gas, allowing growth of said plurality of respective micro-cavities and further combination of adjacent micro-cavities with each other to form an embedded insulating region comprising a combined cavity present all over said predetermined region, and coating of a portion of an inside surface of said cavity within said embedded insulating region with a film.
A method of manufacturing a semiconductor substrate, comprising:
- selectively implanting ions into a predetermined region in a substrate, the implanted ions, in turn, forming a plurality of micro-cavities in said predetermined region;
- and
- giving heat treatment to said substrate, thereby, after discharge of said implanted ions outside of said substrate as gas, allowing growth of said plurality of respective micro-cavities and further combination of adjacent micro-cavities with each other to form an embedded insulating region comprising a combined cavity present all over said predetermined region,
- wherein said combined cavity includes a seam lessly uninterrupted inside surface, and includes an inner space completely closed from outside of said substrate by the inside surface,
- wherein heat treatment in said giving heat treatment includes high-temperature heat treatment, said high-temperature heat treatment allowing combination of adjacent micro-cavities with each other to form said combined cavity present all over said predetermined region, and
- wherein an oxide film at least coating said inside surface of said cavity is formed by carrying out said high-temperature heat treatment in oxygen rich atmosphere, during at least the last certain period of time of said high-temperature heat treatment.
3 more elements
A method of manufacturing a semiconductor substrate, comprising:
- selectively implanting ions into a predetermined region in a substrate, the implanted ions, in turn, forming a plurality of micro-cavities in said predetermined region;
- and
- giving heat treatment to the substrate, thereby, after discharge of said implanted ions outside of said substrate as gas, allowing growth of said plurality of respective micro-cavities and further combination of adjacent micro-cavities with each other to form an embedded insulating region comprising a combined cavity present all over said predetermined region,
- wherein said combined cavity includes a seamlessly uninterrupted inside surface, and includes an inner space completely closed from outside of said substrate by the inside surface,
- wherein heat treatment in said giving heat treatment includes high-temperature heat treatment, said high-temperature heat treatment allowing combination of adjacent micro-cavities with each other to form said combined cavity present all over said predetermined region, and
- wherein an oxide film filling up said inner space of said cavity is formed by carrying out said high-temperature heat treatment in oxygen rich atmosphere, during at least the last certain period of time of said high-temperature heat treatment.
3 more elements
A method of manufacturing a semiconductor device, comprising:
- selectively implanting ions into a predetermined region in a substrate, the implanted ions, in turn, forming a plurality of micro-cavities in said predetermined region;
- giving heat treatment to said substrate, thereby, after discharge of said implanted ions outside of said substrate as gas, allowing growth of said plurality of respective micro-cavities and further combination of adjacent micro-cavities with each other to form an embedded insulating region comprising a combined cavity present all over said predetermined region, and coating of a portion of an inside surface of said cavity within said embedded insulating region with a film;
- and
- forming at least one semiconductor device element in a surface region of the substrate on said embedded insulating region.
1 more element
A semiconductor substrate comprising an embedded insulating region comprising a combined, flat-shaped cavity present all over a predetermined region in the semiconductor substrate,
- wherein said cavity includes a seamlessly uninterrupted inside surface, and includes an inner space completely closed from outside of said substrate by the inside surface, wherein said inside surface is coated with at least an oxide film, said oxide film including a thicker film thickness in a portion, which is formed on side walls of said cavity than in a portion, which is formed on inside upper and lower surfaces of said cavity.
A semiconductor substrate comprising an embedded insulating region comprising a combined, flat-shaped cavity present all over a predetermined region in the semiconductor substrate,
- wherein said cavity includes a seamlessly uninterrupted inside surface, and includes an inner space completely closed from outside of said substrate by the inside surface, and an inside part of said cavity includes no ion-implanted ions into said substrate in order to form said cavity, said inside surface being coated with at least an oxide film, said oxide film including a film thickness in a portion which is formed on side walls of said cavity which is greater than a film thickness in a portion which is formed on inside upper and lower surfaces of said cavity, and
- wherein a surface of said substrate is flat, and an interface between an upper portion of said cavity and said substrate is parallel and flat to a flat surface of said substrate.
A semiconductor device comprising:
- a semiconductor substrate comprising an embedded insulating region comprising a combined, flat-shaped cavity present all over a predetermined region in said semiconductor substrate,
- wherein said cavity includes a seamlessly uninterrupted inside surface, and includes an inner space completely closed from outside of said substrate by the inside surface, wherein said inside surface is coated with at least an oxide film, said oxide film having a thicker film thickness in a portion, which is formed on side walls of said cavity than in a portion, which is formed on inside upper and lower surfaces of said cavity;
- and
- at least one semiconductor device element which is present in a surface region of the semiconductor substrate on said embedded insulating region.
1 more element
A semiconductor device comprising:
- a semiconductor substrate comprising an embedded insulating region comprising a combined, flat-shaped cavity present all over a predetermined region in said semiconductor substrate,
- wherein said cavity includes a seamlessly uninterrupted inside surface, and includes an inner space completely closed from outside of said substrate by the inside surface, said inside surface being coated with at least an oxide film, said oxide film including a film thickness in a portion which is formed on side walls of said cavity that is greater than a film thickness in a portion which is formed on inside upper and lower surfaces of said cavity, and an inside part of said cavity includes no ion-implanted ions into said substrate in order to form said cavity, and wherein a surface of said substrate is flat, and an interface between an upper portion of said cavity and said substrate is flat and parallel to a flat surface of said substrate;
- and
- at least one semiconductor device element which is present on a surface region of the semiconductor substrate on said embedded insulating region.
1 more element
Dependencies are inferred from the claim text.