Chemical mechanical polishing and method for manufacturing semiconductor device using the same
AssigneeDongbu Electronics Co., Ltd.
InventorYoung Seok Jeong
Life of this patent
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Abstract
Provided is a CMP method. According to the CMP method, an interlayer insulating layer having two or more layers is etched to form a trench and/or via hole, and a combined thickness of the two or more layers are measured. A barrier metal layer and a metal layer are sequentially formed in the trench and/or via hole. Portions of the metal layer, the barrier metal layer and the interlayer insulating layer are removed. After that, the combined thickness of the two or more insulating layers is measured again.
Claims19
A CMP (chemical mechanical polishing) method comprising:
- etching an insulating layer including two or more layers to form a trench and/or via hole therein;
- measuring a first thickness of the two or more stacked layers of the insulating layer;
- sequentially forming a baffler metal layer and a metal layer in the trench and/or via hole;
- removing a portion of the metal layer, portions of the barrier metal layer and a portion of only an uppermost stacked layer of the insulating layer by chemical mechanical polishing;
- and
- measuring a second thickness of the two or more stacked layers of the insulating layer after the chemical mechanical polishing.
A method for performing chemical mechanical polishing (CMP) on a semiconductor substrate having two or more stacked insulating layers with similar characteristics, the method comprising:
- measuring a first thickness of the combined two or more similar insulating layers before the chemical mechanical polishing;
- forming a metal layer on an upper surface of the two or more stacked insulating layers after measuring the first thickness;
- chemical mechanical polishing a portion of only an uppermost layer of the two or more stacked insulating layers;
- and
- measuring a second thickness of the two or more stacked insulating layers after the chemical mechanical polishing.
A method for manufacturing a semiconductor device, the method comprising:
- forming an insulating layer including a first insulating layer, a second insulating layer on the first insulating layer, and a third insulating layer on the second insulating layer;
- etching the first, second and third insulating layers to form a trench and/or via hole therein;
- measuring a first thickness of the first, second and third insulating layers;
- sequentially forming a barrier metal layer and a metal layer in the trench and/or via hole;
- removing portions of the metal layer, the barrier metal layer and only the third insulating layer;
- and
- measuring a second thickness of the first, second and third insulating layers after removing portions of the metal layer, the barrier metal layer and only the third insulating layer.
Dependencies are inferred from the claim text.