Methods of sputtering a protective coating on a semiconductor substrate
AssigneeLam Research Corporation
InventorsJisoo Kim, Jong Shon, Biming Yen, Peter Loewenhardt
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Abstract
Methods of depositing a protective coating of a silicon-containing or metallic material onto a semiconductor substrate include sputtering such material from an electrode onto a semiconductor substrate in a plasma processing chamber. The protective material can be deposited onto a multi-layer mask overlying a low-k material and/or onto the low-k material. The methods can be used in dual damascene processes to protect the mask and enhance etch selectivity, to protect the low-k material from carbon depletion during resist strip processes, and/or protect the low-k material from absorption of moisture.
Claims29
A method of depositing a protective coating of a silicon-containing material on a semiconductor substrate in a dual damascene process, the method comprising:
- providing a semiconductor substrate in a capacitively-coupled plasma processing chamber including a first electrode of a silicon-containing material and a second electrode, the semiconductor substrate comprising a low-k dielectric layer and a multi-layer mask including a patterned top imaging layer over the low-k dielectric layer, the semiconductor substrate being supported on the second electrode and the first electrode comprising a showerhead electrode;
- supplying a first process gas through the first electrode into a gap between the first and second electrodes of the plasma processing chamber;
- and
- energizing the first process gas into the plasma state and sputtering the silicon-containing material from the first electrode and forming a protective coating of the sputtered material on the imaging layer, without substantially etching the semiconductor substrate.
A method of depositing a protective coating of a silicon-containing material on a semiconductor substrate in a dual damascene process, the method comprising:
- providing a semiconductor substrate in a capacitively-coupled plasma processing chamber including a first electrode of a silicon-containing material and a second electrode, the semiconductor substrate comprising a patterned low-k dielectric layer and a patterned multi-layer mask over the low-k dielectric layer, the semiconductor substrate being supported on the second electrode and the first electrode comprising a showerhead electrode;
- supplying a first process gas through the first electrode into a gap between the first and second electrodes of the plasma processing chamber;
- and
- energizing the first process gas into the plasma state and sputtering the silicon-containing material from the first electrode and forming a protective coating of the sputtered material on sidewalls of features in the low-k dielectric layer, without substantially etching the semiconductor substrate.
A method of depositing a protective coating of a silicon-containing material on a semiconductor substrate in a dual damascene process, the method comprising:
- providing a semiconductor substrate in a capacitively-coupled plasma processing chamber including a first electrode of a silicon-containing material and a second electrode, the semiconductor substrate comprising a patterned low-k dielectric layer, the semiconductor substrate being supported on the second electrode and the first electrode comprising a showerhead electrode;
- supplying a process gas through the first electrode into a gap between the first and second electrodes of the plasma processing chamber;
- and
- energizing the process gas into the plasma state and sputtering the silicon-containing material from the first electrode and forming a protective coating of the sputtered material on the low-k dielectric layer, without substantially etching the semiconductor substrate.
A method of depositing a protective coating of a silicon-containing material on a semiconductor substrate in a dual damascene process, the method comprising:
- providing a semiconductor substrate in a capacitively-coupled plasma processing chamber including a first electrode of a silicon-containing material and a second electrode, the semiconductor substrate comprising a low-k dielectric layer and an optional multi-layer mask including a patterned top imaging layer over the low-k dielectric layer, the semiconductor substrate being supported on the second electrode and the first electrode comprising a showerhead electrode;
- supplying a process gas through the first electrode into a gap between the first and second electrodes of the plasma processing chamber;
- and energizing the process gas into the plasma state and sputtering the silicon-containing material from the first electrode and forming a protective coating of the sputtered material (i) on sidewalls of features in the low-k dielectric layer or (ii) on the optional imaging layer, without substantially etching the semiconductor substrate.
Dependencies are inferred from the claim text.