Circuit design system and circuit design program
AssigneeNEC Electronics Corporation
InventorJunpei Nonaka
Life of this patent
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Abstract
A circuit design system has: a storage unit in which a netlist is stored; a fault-candidate extracting module configured to extract equivalent fault class Gi from the netlist; a judgment module configured to select a target node out of a plurality of nodes Ni1 to Niji included in the equivalent fault class Gi, wherein Ji is a number of nodes included in the equivalent fault class Gi; and an observation-point inserting module configured to update the netlist by inserting at least one observation point into the target node. The judgment module decides the target node based on the number Ji.
Claims16
A circuit design system comprising:
- a storage unit in which a netlist is stored;
- a fault-candidate extracting module configured to extract equivalent fault class G1 to GI (I is an integer equal to or greater than 1) from said netlist and to generate a fault-candidate data indicating said equivalent fault class Gi (i is an integer not less than 1 and not greater than I), wherein said equivalent fault class Gi is a portion of a design target circuit in which a fault position can not be specified by an external measurement and includes a plurality of nodes Ni1 to Niji (Ji is a number of nodes included in said equivalent fault class Gi);
- a judgment module configured to select a target node out of said plurality of nodes Ni1 to Niji included in said equivalent fault class Gi indicated by said fault-candidate data, wherein at least one observation point used for failure analysis is inserted into said target node;
- and
- an observation-point inserting module configured to update said netlist by inserting said at least one observation point into said target node,
- wherein said judgment module decides said target node based on said number Ji,
- a probability that a fault is included in said equivalent fault class Gi is represented by Pi, a parameter Di with respect to said equivalent fault class Gi is given by the following equation:
- Di=Ji×Pi, and a sum of said parameter Di with respect to all equivalent fault class is represented by M,
- said judgment module decides said target node such that said sum M is reduced due to said insertion of said observation point,
- a reduction rate of said sum M due to said insertion of said observation point takes a maximum value.
A computer readable recording medium with a computer program recorded thereon comprising code that, when executed, causes a computer to perform a circuit design procedures comprising:
- (A) reading a netlist out of a storage unit;
- (B) extracting equivalent fault class G1 to GI (I is an integer equal to or greater than 1) from said netlist, wherein said equivalent fault class Gi (i is an integer not less than 1 and not greater than I) is a portion of a design target circuit in which a fault position can not be specified by an external measurement and includes a plurality of nodes Ni1 to NiJi (J is a number of nodes included in said equivalent fault class Gi);
- (C) selecting a target node out of said plurality of nodes Ni1 to NiJi included in said equivalent fault class Gi, wherein at least one observation point used for failure analysis is inserted into said target node;
- and
- (D) updating said netlist by inserting said at least one observation point into said target node,
- wherein in said (C) step, said target node is decided based on said number Ji,
- a probability that a fault is included in said equivalent fault class Gi is represented by Pi, a parameter Di with respect to said equivalent fault class Gi is given by the following equation:
- Di=Ji×Pi, and a sum of said parameter Di with respect to all equivalent fault class is represented by M,
- said (C) step includes:
- deciding said target node such that said sum M is reduced due to said insertion of said observation point, a reduction rate of said sum M due to said insertion of said observation point takes a maximum value.
Dependencies are inferred from the claim text.