Semiconductor device

A semiconductor device having a plurality of channels, each of the plurality of channels comprising:

• an input buffer circuit for receiving serial data;
• a serial-to-parallel converter for converting said serial data, received by said input buffer circuit, into parallel data;
• a frame synchronization circuit for detecting a frame for synchronization adjustment and for transmitting frame synchronization among plural channels;
• a skew compensation circuit for receiving skew information from said frame synchronization circuit and for compensating for a skew of an interrupt enabling signal and an interrupt frame;
• a parallel-to-serial converter for converting said interrupt frame from said skew compensation circuit into serial data;
• and
• a selector, receiving the interrupt frame from said parallel-to-serial converter and a through-frame from said input buffer circuit, for selecting and outputting said interrupt frame when the interrupt enabling signal from said skew compensation circuit is in an active state and for selecting and outputting said through-frame from said input buffer circuit when the interrupt enabling signal is in an inactive state,
• wherein said semiconductor device comprises, common to the plurality of channels:
• a synchronization pattern generator for generating parallel data including a frame for synchronization adjustment;
• a start delimiter indicating a start of said frame for synchronization adjustment;
• a frame for a confirmation of synchronization and an end delimiter indicating an end of said frame for confirmation of synchronization;
• an interrupt pattern generator for generating supplying said interrupt enabling signal and said interrupt frame to said skew compensation circuit;
• a first pattern monitor for outputting a detection flag to said interrupt pattern generator upon a detection by said frame synchronization circuit of said start delimiter from the parallel data frame-synchronized by said frame synchronization circuit, said interrupt pattern generator receiving the detection flag from said first pattern monitor to generate said interrupt enabling signal and said interrupt frame;
• and
• a second pattern monitor for comparing a pattern obtained upon a merging through-data and interrupt data together with a pattern of expected values to output a comparison result.

A method of testing one of a first semiconductor device and a second semiconductor device, each of which faces the other, the method comprising:

• receiving input serial data, at a time of the testing, from one of the first and the second semiconductor devices;
• selecting interrupt data upon receiving an interrupt signal and through-data when not receiving the interrupt signal;
• merging the interrupt data into a predetermined position in the through-data using a control circuit;
• and
• comparing a pattern resulting from the merging with a pattern of expected values.