Back to results
US 7,599,460 B2Granted
Transmitting apparatus
AssigneeFujitsu Limited
InventorsHiroyuki Matsuo, Eiji Maeda
Life of this patent
Estimating the term…
Abstract
A device including a line interface for additionally installing a line is installed in a terminal repeater device which takes a work and protection redundancy configuration based on a criterion such as SONET, SDH, or the like. Within the device additionally installed, the clocks supplied from work and protection devices are each compared. The respective clocks are variably delayed based on the comparison result so as to allow the device additionally installed to perform clock phase control as to the work and protection lines.
Claims5
A transmitting apparatus, comprising:
- a first device including:
- a first clock source for generating a first clock, and
- a second clock source for generating a second clock;
- and
- a second device including:
- a first timing clock generator for pulling the first clock into the second clock, the first timing clock generator including;
- a first variable delay element for variably delaying the first clock;
- a second variable delay element for variably delaying the second clock;
- a first phase detection circuit for comparing the first clock and the second clock;
- and
- a first phase controller controlling a phase control amount of the first variable delay element and the second variable delay element by the use of a result of the first phase detection circuit;
- and
- a second timing clock generator for pulling the second clock into the first clock, the second timing clock generator including:
- a third variable delay element for variably delaying the first clock;
- a fourth variable delay element for variably delaying the second clock;
- a second phase detection circuit for comparing the first clock and the second clock;
- and
- a second phase controller controlling a phase control amount of the third variable delay element and the fourth variable delay element by the use of a result of the second phase detection circuit.
15 more elements
A transmitting apparatus, comprising:
- a first device including:
- a first clock source for generating a first clock;
- and
- a second clock source for generating a second clock;
- and a second device including:
- a first timing clock generator for pulling the first clock into the second clock, the first timing clock generator including:
- a first PLL circuit for firstly multiplying the first clock;
- a second PLL circuit for secondly multiplying the second clock;
- a first phase adjustment for counting the firstly-multipled first clock and outputting a first counted result;
- a second phase adjustment for counting the secondly-multiplied second clock and outputting a second counted result;
- a first phase detection circuit for performing phase comparison based on the first counted result with the second counted result and outputting a first phase comparison result;
- and
- a first phase control circuit for adjusting a timing for dividing of the firstly-multiplied first clock and the secondly-multiplied second clock at the first PLL circuit and the second PLL circuit;
- and
- a second timing clock generator pulling the second clock into the first clock, the second timing clock generator including:
- a third PLL circuit for thirdly multiplying the first clock;
- a fourth PLL circuit for fourthly multiplying the second clock;
- a third phase adjustment for counting the thirdly-multiplied first clock and outputting a third counted result;
- a fourth phase adjustment for counting the fourthly-multiplied second clock and outputting a fourth counted result;
- a second phase detection circuit for performing phase comparison based on the third counted result with the fourth counted result and outputting a
- second phase comparison result;
- and a second phase control circuit for adjusting a timing for dividing of the thirdly-multiplied first clock and the fourthly-multiplied second clock at the first PLL circuit and the second PLL circuit.
19 more elements
A transmitting apparatus, comprising:
- a first device including:
- a first clock source for generating a first clock;
- and
- a second clock source for generating a second clock;
- and a second device including:
- a first timing clock generator including:
- a first PLL circuit for synchronizing an internal clock with the first clock and outputting a first reference clock, and
- a first variable delay element for applying a delay to the first reference clock;
- a second timing clock generator including:
- a second PLL circuit for synchronizing an internal clock with the second clock and outputting a second reference clock, and
- a second variable delay element for applying a delay to the second reference clock;
- a first phase detection circuit for comparing the first reference clock with the second reference clock and outputting a first result;
- a second phase detection circuit for comparing the first reference clock with the second reference clock and outputting a second result;
- and
- a controller for controlling the first reference clock and the second reference clock at the first timing clock generator and the second timing clock generator on the bases of the first result of the first phase detection circuit and the second result of the second phase detection circuit.
12 more elements
Dependencies are inferred from the claim text.