Methods and systems for reducing waiting-time jitter

#This is the first application filed for the present invention.

#Not Applicable.

#This invention relates to communications networks, and in particular to methods and systems for reducing waiting-time jitter.

#Further features and advantages of the present invention will become apparent from the following detailed description, taken in combination with the appended drawings, in which:

#FIG. 1 is a block diagram schematically illustrating conventional originating and terminating nodes of an optical communications network;

#FIG. 2 is a block diagram schematically illustrating originating and terminating nodes known from U.S. patent application Ser. No. 09/972,686;

#It will be noted that throughout the appended drawings, like features are identified by like reference numerals.

#The present invention provides methods and apparatus for reducing jitter by minimizing the effects of phase measurement ambiguities. Embodiments of the invention are described below, by way of example only, with reference to FIGS. 5a-9.

#In general, the present invention operates by attenuating (or damping) the response of the timing estimate calculation to phase measurement jitter due to noise and ambiguity, without altering its linear response to larger variations due to the frequency difference (or ratio f1/f2) between the data clock signal 10 and the Tx local clock signal 26. This technique relies on the observation that the frequency ratio f1/f2 is dominated by low frequency (e.g. on the order of about 10 Hz or lower) variations due to wander or drift of the Tx local clock 22 and the clock recovery circuit 12. On the other hand, ambiguity (i.e. quantization error and lag) of the phase measurement, and noise tend to introduce jitter in the form of low magnitude high frequency (e.g. on the order of 10 kHz or higher) transients. As a result, the phase error signal 74 appearing at the output of the integrator 72 comprises a “true” component due to the actual frequency difference (or ratio f1/f2); an error component due to ambiguity; and noise. The magnitude of the true component increases monotonically as successive phase samples pi are latched into the PLL 62, and the error component and noise remain bounded within a comparatively narrow band about the true component. These characteristics enable suppression of both the error component due to ambiguity and noise, thereby permitting improved accuracy of the phase estimate Fs. In the following discussion, the present invention is described, by way of three representative alternative methods, namely: phase error non-linearity, notch filter and error estimation.