Wire-speed packet management in a multi-pipeline network processor
AssigneeP-Cube Ltd.
InventorOren Malerevich
Life of this patent
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AssigneeP-Cube Ltd.
InventorOren Malerevich
Estimating the term…
A flow-identification content addressable memory (FICAM) comprising a row of content addressable memory (CAM) cells operable to store a first flow-identification. The first flow-identification corresponds to a first packet dispatched for processing by a pipeline unit (PU) belonging to a network processor. A comparison unit compares a second flow-identification corresponding to a second packet with contents of said at least a row of CAM cells. The comparison unit is further capable of determining if the second flow-identification is same as the first flow-identification. A flow identification eraser is provided for removing the first flow-identification from said at least a row of CAM cells upon determination by the comparison unit that the second flow-identification is same as the first flow-identification.
A network processor for maintaining processing order of data packets in a process flow, the network processor comprising:
A method for maintaining processing order of data packets in a process flow, the method comprising:
Dependencies are inferred from the claim text.