Methods and systems for reducing heat flux in memory systems

#This invention relates to methods and systems for reducing heat flux in memory systems.

#During the last two decades, DRAM technology has progressed dramatically. Device densities have increased from 1 Kbit per chip to 64 Mbits per chip, a factor of 64,000. DRAM performance has not kept pace with these density changes, since access times have decreased by about a factor of 5. Over the same 20 year period, microprocessor performance has jumped by several orders of magnitude. This growing disparity between the speed of microprocessors and that of DRAMs has forced system designers to create a variety of complicated and expensive hierarchical memory techniques, such as SRAM caches and parallel arrays of DRAMs. In addition, now that users demand high performance graphics, systems often rely on expensive frame buffers to provide the necessary bandwidth. And, due to the density increases in DRAMs, this need for bandwidth is required from fewer total chips.

#To address this processor-to-memory performance gap, Rambus Inc., the assignee of this document, has developed a revolutionary chip-to-chip bus, termed the “Direct Rambus Channel”, that operates up to 10 times faster than conventional DRAMS. The Direct Rambus Channel connects memories to devices such as microprocessors, digital signal processors, graphics processors, and ASICs. The Channel uses a small number of very high speed signals to carry all address, data, and control information. Because it is able to transfer data at 1.6 Gbytes per second at a moderate cost, the Direct Rambus Channel is ideal for high performance/low cost systems.

#FIG. 1 is block diagram of an exemplary memory system in accordance with the prior art.

#FIG. 2 is a block diagram of a memory system in accordance with one or more of the described embodiments.

#FIG. 2A is a block diagram of a memory system in accordance with one or more of the described embodiments.

#Overview

#Systems and methods for reducing heat flux in memory systems are described. In various embodiments described below, heat flux reductions are achieved by manipulating the device IDs of individual memory devices that comprise one or more memory modules. As will be seen, through the various described techniques, the heat flux can be desirably reduced. Further, in some embodiments, reductions in heat flux are achieved by providing control lines that operably connect memory devices on different faces of a memory module.

#Increasing Bandwidth