Reduced power programming of non-volatile cells
AssigneeSaifun Semiconductors Ltd.
InventorEduardo Maayan
Life of this patent
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Abstract
Methods for minimizing current consumption in a memory array during programming of non-volatile memory cells, such as NROM cells, in the array include: programming a cell without having a direct current flowing from a positive supply to ground through the array, programming a plurality of cells with programming pulses without discharging a global bit line carrying a programming voltage between programming pulses, and programming a cell with transient currents.
Claims22
A method of programming a non-volatile memory cell comprising:
- applying only a substantially transient current to a source or drain terminal of the cell;
- wherein applying only a substantially transient current comprises providing a programming voltage to a source or drain of said cell;
- and after said source or drain voltage is applied, disconnecting a second terminal of the non-volatile memory cell from a ground voltage.
A non-volatile memory (“NVM”) device comprising:
- an NVM array including a set of NVM cells;
- a power supply circuit portion for providing current at one or more voltages;
- a switching circuit adapted to regulate electrical paths between NVM cells within said array and said power supply circuit;
- and control logic adapted to cause said switching circuit to provide substantially transient current flow from said power supply circuit to one or more NVM cells in said array during programming.
A non-volatile memory (“NVM”) cell programming circuit comprising:
- a power supply circuit portion for providing current at one or more voltages;
- a programming circuit portion adapted to apply substantially transient current flow from said power supply circuit to one or more NVM cells during programming, and wherein said programming circuit portion is adapted to disconnect a source of each of the one or more NVM cells from a ground voltage and to provide a programming voltage to a drain of each of the one or more cells during programming.
A non-volatile memory (“NVM”) cell programming circuit comprising:
- a power supply circuit portion for providing current at one or more voltages;
- a programming circuit portion adapted to apply substantially transient current flow from said power supply circuit to one or more NVM cells during programming;
- and wherein said programming circuit portion is adapted to provide a programming voltage to a drain of each of the one or more NVM cells and then to disconnect a source each of the one or more NVM cells from a ground voltage.
Dependencies are inferred from the claim text.