Memory circuit, drive circuit for a memory and method for writing write data into a memory

A method for writing write data into a memory transistor in a memory circuit with a first non-volatile memory transistor with a floating gate electrode and a gate terminal, a second non-volatile memory transistor with a floating gate electrode and a gate terminal, a first switch connected between a drain terminal of the first memory transistor and a bit line for reading out information stored in the memory circuit, and a second switch connected between a drain terminal of the second memory transistor and the bit line, wherein the first switch and the second switch are formed to selectively couple the drain terminal of the first memory transistor or the drain terminal of the second memory transistor to the bit line during readout, into one of the memory transistors in a write operation, comprising:

• receiving write data;
• providing equal signals for the gate terminals of the first memory transistor and the second memory transistor based on the write data;
• providing a programming signal for a source terminal of the memory transistor to be written to, wherein the programming signal is formed to allow a state stored in the memory transistor to be written to be changed;
• and
• driving a source terminal of a memory transistor not to be written to of the first memory transistor and the second memory transistor such that a state stored in the memory transistor not to be written to is not changed.

A memory circuit comprising:

• a first non-volatile memory transistor with a floating gate electrode and a gate terminal;
• and
• a second non-volatile memory transistor with a floating gate electrode and a gate terminal;
• a first switch connected between a drain terminal of the first memory transistor and a bit line for reading out information stored in the memory circuit;
• a second switch connected between a drain terminal of the second memory transistor and the bit line, wherein the first switch and the second switch are formed to selectively couple the drain terminal of the first memory transistor or the drain terminal of the second memory transistor to the bit line during readout;
• and
• means for writing data into one of the memory transistors, wherein the means are designed to apply equal signals to the gate terminals of the first memory transistor and the second memory transistor based on the write data, to apply a programming signal at a source terminal of the memory transistor to be written to, and to drive a source terminal of a memory transistor not to be written to such that a state stored remains unchanged.