US 7,599,166 B2 · Multilayer chip capacitor · patentgrep

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Abstract

A multilayer chip capacitor includes a capacitor body having dielectric layers, and internal electrode layers separated from each other in the capacitor body by the dielectric layers. Each internal electrode layer has one or two leads and includes at least one coplanar electrode plate. External electrodes are electrically connected to the internal electrode layers via the leads. The internal electrode layers constitute a plurality of blocks stacked repeatedly. Each block includes a plurality of the internal electrode layers stacked successively. The leads extending to a face of the capacitor body are arranged in a zigzag shape along a stacking direction. The leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other.

Claims40

Dependent claims

A multilayer chip capacitor comprising:

a capacitor body having a plurality of dielectric layers stacked one atop another;
a plurality of internal electrode layers separated from each other in the capacitor body by the dielectric layers, wherein each of the internal electrode layers has one or two leads extending to an outer surface of the capacitor body, and includes at least one coplanar electrode plate;
and
a plurality of external electrodes arranged on the outer surface of the capacitor body and electrically connected to the internal electrode layers via the leads,
wherein the internal electrode layers constitute a plurality of blocks stacked repeatedly one atop another, each of the blocks including a plurality of the internal electrode layers which are arranged successively in a stacking direction;
each of the electrode plates has one lead extending to a face of the capacitor body;
the leads extending to the face of the capacitor body are arranged in a zigzag shape along the stacking direction;
and
the leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other,
wherein the total number of the external electrodes is eight, and
wherein each of the blocks includes six of the internal electrode layers which are arranged successively in the stacking direction.

8 more elements

A multilayer chip capacitor comprising:

a capacitor body having a plurality of dielectric layers stacked one atop another;
a plurality of internal electrode layers separated from each other in the capacitor body by the dielectric layers, wherein each of the internal electrode layers has one or two leads extending to an outer surface of the capacitor body, and includes at least one coplanar electrode plate;
and
a plurality of external electrodes arranged on the outer surface of the capacitor body and electrically connected to the internal electrode layers via the leads,
wherein the internal electrode layers constitute a plurality of blocks stacked repeatedly one atop another, each of the blocks including a plurality of the internal electrode layers which are arranged successively in a stacking direction;
each of the electrode plates has one lead extending to a face of the capacitor body;
the leads extending to the face of the capacitor body are arranged in a zigzag shape along the stacking direction;
and
the leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other,
wherein the total number of the external electrodes is ten and
wherein each of the blocks includes eight of the internal electrode layers which are arranged successively in the stacking direction.

8 more elements

A multilayer chip capacitor comprising:

a capacitor body having a plurality of dielectric layers stacked one atop another;
a plurality of internal electrode layers separated from each other in the capacitor body by the dielectric layers, wherein each of the internal electrode layers has one or two leads extending to an outer surface of the capacitor body, and includes at least one coplanar electrode plate;
and
a plurality of external electrodes arranged on the outer surface of the capacitor body and electrically connected to the internal electrode layers via the leads,
wherein the internal electrode layers constitute a plurality of blocks stacked repeatedly one atop another, each of the blocks including a plurality of the internal electrode layers which are arranged successively in a stacking direction;
each of the electrode plates has one lead extending to a face of the capacitor body;
the leads extending to the face of the capacitor body are arranged in a zigzag shape along the stacking direction;
and
the leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other,
wherein at least one of the internal electrode layers in each block is divided into coplanar electrode plates by a separator slit, and wherein each of the electrode plates has a lead for electrically connecting the electrode plate to a corresponding one of the external electrodes,
wherein the total number of the external electrodes is eight, and
wherein each of the blocks includes six of the internal electrode layers arranged successively in the stacking direction, and three of the six internal electrode layers each are divided into a pair of the coplanar electrode plates.

9 more elements

A multilayer chip capacitor comprising:

a capacitor body having a plurality of dielectric layers stacked one atop another;
a plurality of internal electrode layers separated from each other in the capacitor body by the dielectric layers, wherein each of the internal electrode layers has one or two leads extending to an outer surface of the capacitor body, and includes at least one coplanar electrode plate;
and
a plurality of external electrodes arranged on the outer surface of the capacitor body and electrically connected to the internal electrode layers via the leads,
wherein the internal electrode layers constitute a plurality of blocks stacked repeatedly one atop another, each of the blocks including a plurality of the internal electrode layers which are arranged successively in a stacking direction;
each of the electrode plates has one lead extending to a face of the capacitor body;
the leads extending to the face of the capacitor body are arranged in a zigzag shape along the stacking direction;
and
the leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other,
wherein each of the internal electrode layers comprises one undivided electrode plate, and each of the electrode plates has a lead electrically connecting to the external electrode,
wherein the total number of the external electrodes is eight, and
wherein each of the blocks includes first to sixth ones of the internal electrode layers stacked sequentially.

9 more elements

A multilayer chip capacitor comprising:

a capacitor body having a plurality of dielectric layers stacked one atop another;
a plurality of internal electrode layers separated from each other in the capacitor body by the dielectric layers, wherein each of the internal electrode layers has one or two leads extending to an outer surface of the capacitor body, and includes at least one coplanar electrode plate;
and
a plurality of external electrodes arranged on the outer surface of the capacitor body and electrically connected to the internal electrode layers via the leads,
wherein the internal electrode layers constitute a plurality of blocks stacked repeatedly one atop another, each of the blocks including a plurality of the internal electrode layers which are arranged successively in a stacking direction;
each of the electrode plates has one lead extending to a face of the capacitor body;
the leads extending to the face of the capacitor body are arranged in a zigzag shape along the stacking direction;
and
the leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other,
wherein each of the internal electrode layers comprises one undivided electrode plate, and each of the electrode plates has a lead electrically connecting to the external electrode,
wherein the total number of the external electrodes is ten, and
wherein each of the blocks includes first to eighth ones of the internal electrode layers stacked sequentially.

9 more elements

A multilayer chip capacitor comprising:

a capacitor body having a plurality of dielectric layers stacked one atop another;
a plurality of internal electrode layers separated from each other in the capacitor body by the dielectric layers, wherein each of the internal electrode layers has one or two leads extending to an outer surface of the capacitor body, and includes at least one coplanar electrode plate;
and
a plurality of external electrodes arranged on the outer surface of the capacitor body and electrically connected to the internal electrode layers via the leads,
wherein the internal electrode layers constitute a plurality of blocks stacked repeatedly one atop another, each of the blocks including a plurality of the internal electrode layers which are arranged successively in a stacking direction;
each of the electrode plates has one lead extending to a face of the capacitor body;
the leads extending to the face of the capacitor body are arranged in a zigzag shape along the stacking direction;
and
the leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other,
wherein each of the electrode plates has a non-separator slit extended from a side of the electrode plate toward the center to change a current flow inside the electrode plate, and
wherein the separator slits and the non-separator slits are extended in parallel with the longitudinal direction of the capacitor body.

8 more elements

A multilayer chip capacitor comprising:

a capacitor body of a plurality of dielectric layers stacked one atop another;
a plurality of internal electrode layers separated from each other in the capacitor body by the dielectric layers, wherein each of the internal electrode layers has one or two leads extending toward an outer surface of the capacitor body, and includes at least one coplanar electrode plate;
and
a plurality of external electrodes arranged on the outer surface of the capacitor body and electrically connected to the internal electrode layers via the leads,
wherein the internal electrode layers constitute blocks stacked repeatedly one atop another, each of the blocks includes a plurality of the internal electrode layers which are arranged successively in a stacking direction;
and
the leads of vertically adjacent ones of the electrode plates having opposite polarities are arranged to be horizontally adjacent to each other,
wherein the total number of the external electrodes is eight, and
wherein each of the blocks includes first to eighth ones of the internal electrode layers stacked sequentially;
each of the fourth and eighth internal electrode layers has a pair of leads extending to opposite faces of the capacitor body;
and
each of the first to third and fifth to seventh internal electrode layers has one lead.

9 more elements

Dependencies are inferred from the claim text.