Output control device and recording-medium-driver control device

A method comprising:

• receiving a clock signal generated by an oscillator;
• determining whether the clock signal has an amplitude equal to or greater than a predetermined value;
• outputting the clock signal to an output destination when the determining unit determines that the clock signal has the amplitude equal to or greater than the predetermined value, and suspends the output of the clock signal to the output destination when the determining unit determines that the clock signal does not have the amplitude equal to or greater than the predetermined value:
• outputting a “High” signal from the determining trait if the determining unit determines that the clock signal has the amplitude equal to or greater than the predetermined value and a “Low” signal if the determining unit determines that the clock signal does not have the amplitude equal to or greater than the predetermined value
• wherein an error output unit restarts a data storing device when the clock signal is not oscillated with the amplitude equal to or greater than the predetermined value within a predetermined time from a time the oscillator starts outputting the clock signal.
• receiving at a first AND gate the clock signal generated by the oscillator and the delayed “High” or “Low” signal from the delay circuit and outputting from the first AND gate the clock signal received if the first AND gate receives the delayed “High” signal from the delay circuit;
• outputting from a second AND gate a “High” output signal if the second AND gate receives the delayed “Hgh” signal from the delay circuit and a “High” reset signal;
• and
• receiving at a third AND gate as the output control unit the clock signal from the first AND gate and outputting from the third AND gate the clock signal received to the output destination if the third AND gate receives the “High” output signal from the second AND gate.

A recording-medium-driver control device comprising:

• a determining unit that receives a clock signal generated by an oscillator and determines whether the clock signal has an amplitude equal to or greater than a predetermined value;
• an output control unit that outputs the clock signal to an output destination when the determining unit determines that the clock signal has the amplitude equal to or greater than the predetermined value, and suspends the output of the clock signal to the output destination when the determining unit determines that the clock signal does not have the amplitude equal to or greater than the predetermined value;
• and
• a recording-medium-driver control unit that is controlled by the clock signal output from the output control unit,
• wherein the determining unit is configured to output a “High” signal if the determining unit determines that the clock signal has the amplitude and a “Low” signal if the determining unit determines that the clock signal does not have the amplitude, and the recording-medium-driver control device further comprises:
• a delay circuit configured to receive the “High” or “Low” signal from the determining unit and delay the “High” or “Low” signal for a predetermined time period;
• a first AND gate configured to receive the clock signal generated by the oscillator and the delayed “High” or “Low” signal from the delay circuit and output the clock signal received if the first AND gate receives the delayed “High” signal from the delay circuit:
• a second AND gate configured to output a “High” output signal if the second AND gate receives the delayed “High” signal from the delay circuit and a “High” reset signal;
• and
• a third AND gate as the output control unit configured to receive the clock signal from the first AND gate and output the clock signal received to the output destination if the third AND gate receives the “High” output signal from the second AND gate.

An output control device that controls an output of a clock signal generated by an oscillator, the output control device comprising:

• a determining unit that receives the clock signal generated by the oscillator and determines whether the clock signal has an amplitude equal to or greater than a predetermined value;
• and
• an output control unit that outputs the clock signal to an output destination when the determining unit determines that the clock signal has the amplitude equal to or greater than the predetermined value,
• wherein an error output unit restarts a data storing device when the clock signal is not oscillated with the amplitude equal to or greater than the predetermined value within a predetermined time from a time the oscillator starts outputting the clock signal.