Thin film transistor array panel and a method for manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsYoung-Wook Lee, Jang-Soo Kim
Life of this patent
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Abstract
A thin film transistor array panel includes a substrate; a plurality of gate lines that are formed on the substrate; a plurality of data lines that intersect the gate lines; a plurality of thin film transistors that are connected to the gate lines and the data lines; a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors; a common electrode that is formed on the color filters and that includes a transparent conductor; a passivation layer that is formed on an upper part of the common electrode; and a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
Claims17
A thin film transistor array panel comprising:
- a substrate;
- a plurality of gate lines that are formed on the substrate;
- a plurality of data lines that intersect the gate lines;
- a plurality of thin film transistors that are connected to the gate lines and the data lines;
- a plurality of color filters that are formed on upper parts of the gate lines, the data lines, and the thin film transistors;
- a common electrode that is formed on the color filters and that includes a transparent conductor;
- a passivation layer that is formed on an upper part of the common electrode;
- and
- a plurality of pixel electrodes that are formed on an upper part of the passivation layer and that are connected to a drain electrode of each of the thin film transistors.
A method of manufacturing a thin film transistor array panel, comprising:
- forming a gate line on an insulation substrate;
- forming a gate insulating layer covering the gate line;
- forming a semiconductor on an upper part of the gate insulating layer;
- forming a data line and a drain electrode on the upper part of the gate insulating layer, the data line having a source electrode;
- forming a color filter on upper parts of the data line and the drain electrode;
- forming a common electrode on an upper part of the color filter;
- forming a passivation layer covering the common electrode;
- and
- forming a pixel electrode on an upper part of the passivation layer.
A thin film transistor array panel comprising:
- a substrate;
- a plurality of gate lines formed on the substrate;
- a plurality of data lines intersecting the gate lines;
- a plurality of thin film transistors connected to the gate lines and the data lines;
- a plurality of color filters formed above of the gate lines, the data lines, and the thin film transistors;
- a common electrode formed on the color filters;
- a first passivation layer formed on an upper part of the common electrode;
- a second passivation layer formed on an upper part of a drain electrode of each of the thin film transistors;
- and
- a plurality of pixel electrodes formed on an upper part of the first passivation layer and that are electrically connected to the drain electrode through an opening.
Dependencies are inferred from the claim text.