Shorted input detection for amplifier circuits
AssigneeCypress Semiconductor Corporation
InventorsPulkit Shah, Gajender Rohilla
Life of this patent
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Abstract
A method and an apparatus are described for shorted input detection for amplifier circuits. An embodiment of a circuit includes multiple amplifier circuits, with each amplifier circuit having an input and an output. The circuit also includes multiple short detection circuits, with one of the short detection circuits being coupled to the input of each amplifier circuit. Each short detection circuit has an active state for detection of short circuits and an inactive state for normal amplifier operation. The circuit also includes a register coupled with the output of each of the amplifier circuits to hold the output of one or more of the amplifier circuits.
Claims19
A circuit comprising:
- a plurality of amplifier circuits, each amplifier circuit having an input and an output;
- a plurality of short detection circuits, a short detection circuit of the plurality of short detection circuits being coupled to the input of each amplifier circuit, each short detection circuit having an active state for detection of short circuits and an inactive state for normal amplifier operation;
- and
- a register coupled with the output of each of the plurality of amplifier circuits, the register to hold the output of one or more of the amplifier circuits.
A method of detecting a shorted input in an amplifier circuit comprising:
- driving an input node of a first amplifier of a plurality of amplifiers to a first voltage potential;
- driving an input node of each other amplifier of the plurality of amplifiers to a second voltage potential;
- comparing an output of the first amplifier to an expected value;
- and
- if the output of the first amplifier does not match the expected value, determining that a short exists between the input node of the first amplifier and the input node of one or more of the other amplifiers of the plurality of amplifiers.
A system comprising:
- a plurality of amplifier channels including at least one differential amplifier channel, the differential amplifier channel including a first input and a second input;
- and
- a plurality of short detection circuits, a short detection circuit being coupled with each of the plurality of amplifier channels, a short detection circuit being coupled with the differential amplifier channel at the first input and at the second input, wherein the plurality of short detection circuits are utilized in detecting shorts between any of the amplifier channels and between the first input and the second input of the differential amplifier channel.
A system comprising:
- a plurality of amplifier channels including at least one differential amplifier channel, the differential amplifier channel including a first input and a second input;
- and
- a plurality of short detection circuits, a short detection circuit being coupled with each of the plurality of amplifier channels, a short detection circuit being coupled with the differential amplifier channel at the first input and at the second input, wherein the short detection circuit coupled with the differential amplifier channel comprises an inverter coupled with the first input and a NAND gate coupled with the second input.
A system comprising:
- a plurality of amplifier channels including at least one differential amplifier channel, the differential amplifier channel including a first input and a second input;
- and
- a plurality of short detection circuits, a short detection circuit being coupled with each of the plurality of amplifier channels, a short detection circuit being coupled with the differential amplifier channel at the first input and at the second input, wherein the plurality of amplifier channels are coupled with a plurality of outputs from a photodiode array.
Dependencies are inferred from the claim text.