Signal transferring system with unequal lengths of connecting paths and method thereof

An apparatus for transferring at least two transferred signal, comprising:

• first and second terminals, respectively coupled to first and second transmission paths, for transferring the at least two transferred signal, wherein a length of the first transmission path is different from that of the second transmission path;
• an interface, coupled to the first and the second terminals, for receiving or outputting the at least two transferred signals;
• a compensation circuit, coupled to the interface, for adjusting transmission time of one of the at least two transferred signals or adjusting reception time of one of the at least two transferred signals such that the at least two transferred signals reach the second circuit through the first and the second transmission layout paths at substantially the same time;
• at least one register for storing at least one delay amount;
• and
• at least one delay unit, coupled to at least one of the first and the second terminals, for delaying at least one of the at least two transferred signals according to the at least one delay amount.

A method for transferring first and second transferred signals, comprising:

• providing first and second circuits, respectively coupled to first and second transmission paths, to transfer the first and second transferred signals, wherein a length of the first transmission path is different from that of the second transmission path;
• adjusting transmission time of at least one of the first and second transferred signals or adjusting reception time of at least one of the first and second transferred signals by a compensation circuit such that the at least two transferred signals reach the second circuit through the first and the second transmission paths at substantially the same time;
• providing first and second clock signals to the compensation circuit;
• and
• respectively transferring the first and the second transferred signals according to the first and the second clock signals, wherein the first and the second clock signals have a phase difference corresponding to the lengths of the first and the second transmission paths.

A signal transferring system comprising:

• a first circuit for transmitting at least two transferred signals;
• a second circuit for receiving the at least two transferred signals;
• first and second transmission paths, coupled between the first circuit and the second circuit, wherein a length of the first transmission path is different from that of the second transmission path;
• and
• a control circuit, for generating a first clock and a second clock;
• wherein one of the first circuit and the second circuit comprises a compensation circuit for adjusting transmission time of one of the at least two transferred signals or adjusting reception time of one of the at least two transferred signals such that the at least two transferred signals reach a second circuit through the first and the second transmission paths at substantially the same time;
• wherein the system further comprises first and second buffers, respectively coupled to the first and the second transmission paths, for controlling transmission of the at least two transferred signals according to the first clock and the second clock.

An apparatus for transferring at least two transferred signal, comprising:

• first and second terminals, respectively coupled to first and second transmission paths, for transferring the at least two transferred signal, wherein a length of the first transmission path is different from that of the second transmission path;
• an interface, coupled to the first and the second terminals, for receiving or outputting the at least two transferred signals;
• and
• a compensation circuit, coupled to the interface, for adjusting transmission time of one of the at least two transferred signals or adjusting reception time of one of the at least two transferred signals such that the at least two transferred signals reach a second circuit through the first and the second transmission layout paths at substantially the same time;
• wherein the compensation circuit comprises a control circuit, for generating a first clock and a second clock;
• and the interface comprises first and second buffers, respectively coupled to the first and the second terminals, for controlling transmission of the at least two transferred signals according to the first clock and the second clock.