High-speed reduced-output-swing self-biased fully-complementary CMOS comparator with rail-to-rail input common-mode range
AssigneeMarvell Israel (M.I.S.L) Ltd.
InventorMel Bazes
Life of this patent
Estimating the term…
Abstract
A CMOS comparator having a high-speed reduced-output-swing is provided. The high-speed reduced-output-swing comparator may have a fully complementary CMOS design, be self-biased, and have a rail-to-rail input common-mode range. The self-biasing scheme yields a robust comparator with a low sensitivity to temperature, processing variations, supply-voltage variations, and common-mode input voltages. The fully-complementary design leads to a physically small device with low power consumption. The rail-to-rail input common-mode range leads to a versatile comparator which may take a wide range of inputs. The high-speed reduced-output-swing allows for a quick output response to changes in the input.
Claims28
A digital to analog interface comprising:
- input circuitry operable to receive digital input signals and to generate digital output signals;
- comparator circuitry operable to receive said digital output signals from said input circuitry and to generate reduced range output signals, wherein said reduced range output signals have a maximum voltage difference that is significantly smaller than a maximum voltage difference between said digital output signals of said input circuitry;
- and
- output circuitry operable to receive said reduced range output signals from said comparator circuitry and to generate analog output signals.
A digital to analog interface comprising:
- input means operable to receive digital input signals and to generate digital output signals;
- comparator means for receiving said digital output signals from said input means and generating reduced range output signals, wherein said reduced range output signals have a maximum voltage difference that is significantly smaller than a maximum voltage difference between said digital output signals of said input means;
- and
- output means for receiving said reduced range output signals from said comparator means and for generating analog output signals.
A method for interfacing digital input circuitry with analog output circuitry using a comparator, the method comprising:
- generating two digital signals using said digital input circuitry;
- comparing relative voltages of said digital signals using said comparator;
- generating reduced range analog signals using said comparator, wherein said reduced range analog signals have a maximum voltage difference that is significantly smaller than a maximum voltage difference between said digital signals;
- and
- controlling said analog output circuitry with said reduced range analog signals.
Dependencies are inferred from the claim text.