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US 7,598,726 B1Granted
Methods and apparatuses for test methodology of input-output circuits
AssigneeVirage Logic Corporation
InventorSassan Tabatabaei
Life of this patent
Estimating the term…
Abstract
Various methods and apparatuses are described for a system that includes some on-chip components, e.g., I/Os, test processors, soft wrappers, etc., an external testing unit that provides Parametric Measurement Unit (PMU) capability, a Device Interface Board (DIB) that includes resistors between the chip and the external tester, and various tests performed on the I/Os by the on-chip testing logic and external testing unit facilitated through the DIB.
Claims24
An apparatus, comprising:
- a device interface board having a first plurality of connection paths to connect two or more Input-Output (I/O) circuits in a first group of I/O circuits to a first pin on a tester that is external to a platform containing all of the I/O circuits, where the first pin to couple to a first Parametric Measurement Unit (PMU), wherein the first plurality of connection paths connects the two or more I/O circuits in the first group of I/O circuits to the first PMU via its own resistor and the device interface board has a switch to connect a terminal of all of the resistors coupled to their respective I/O circuit in the first group of I/O circuits to ground.
A method, comprising:
- performing at least one of 1) a Direct Current (DC) voltage parameter test and 2) DC current parameter test on each Input-Output (I/O) circuit in a group of I/O circuits connected through its own resistor to a first pin on an external test unit that executes a Parametric Measurement Unit (PMU) function, where a device interface board coupled to the external test unit has a switch to connect a terminal of all of the resistors coupled to their respective I/O circuit in a first group of I/O circuits to ground and the first group has two or more I/O circuits;
- determining a DC output voltage level supplied from each I/O circuit in the group of I/O circuits, one I/O circuit at a time by enabling an output driver and a pull up transistor of an individual I/O circuit under test, and measuring a first amount of current flowing to the PMU from the individual I/O circuit under test, and
- sequentially repeating this determining of DC output voltage level step for each remaining I/O circuit in the group.
An apparatus, comprising:
- a first plurality of Input-Output (I/O) circuits connectable via one or more resistors to a first pin on a tester that is external to the apparatus containing all of the I/O circuits, where the first pin is to couple to a first Parametric Measurement Unit (PMU), wherein a switch connects a terminal to ground for of all of the resistors coupled to their respective I/O circuit in the first plurality of I/O circuits;
- and
- a soft wrapper circuit coupled to the first plurality of I/O circuits, wherein the soft wrapper circuit has logic configured to send control signals to enable as well as disable pull up and pull down transistors in the first plurality of I/O circuits.
Dependencies are inferred from the claim text.