Stack package utilizing through vias and re-distribution lines
AssigneeHynix Semiconductor Inc.
InventorsSeung Hyun Lee, Min Suk Suh
Life of this patent
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AssigneeHynix Semiconductor Inc.
InventorsSeung Hyun Lee, Min Suk Suh
Estimating the term…
A stack package includes a printed circuit board; at least two semiconductor chips stacked on the printed circuit board, each having first re-distribution lines formed on the upper surface thereof and connected to bonding pads, through silicon vias which are formed therethrough and connected to the first re-distribution lines, and second re-distribution lines formed on the lower surface thereof and connected to the through silicon vias; first and second solder balls interposed between the first and second re-distribution lines which face each other and between the first re-distribution lines of the lowermost semiconductor chip and electrode terminals of the printed circuit board; a molding material for molding the upper surface of the printed circuit board including the stacked semiconductor chips; and third solder balls attached to ball lands formed on the lower surface of the printed circuit board.
A stack package comprising:
Dependencies are inferred from the claim text.