Test structures for stacking dies having through-silicon vias

A semiconductor package structure comprising:

• a first die comprising a loop-back structure, the loop-back structure comprising:
• a first bonding pad on a first surface of the first die;
• and
• a second bonding pad on the first surface of the first die;
• and
• a conductive feature electrically shorting the first and the second bonding pads;
• and
• a second die bonded onto the first die, wherein the second die comprises an interconnect structure comprising:
• a third bonding pad and a fourth bonding pad on a first surface of the second die, wherein the third and the fourth bonding pads are bonded to the first and the second bonding pads of the first die, respectively;
• a first and a second through-silicon via;
• and
• a fifth and a sixth bonding pad on a second surface opposite the first surface of the second die, wherein the third and the fifth bonding pads are electrically shorted through the first through-silicon via, and wherein the fourth and the sixth bonding pads are electrically shorted through the second through-silicon via.

A semiconductor package structure comprising:

• a first die;
• a second die bonded onto the first die;
• and
• a plurality of test structures formed throughout the first and the second dies, wherein each of the plurality of test structures comprises:
• a loop-back structure in the first die comprising:
• a first bonding pad on a first surface of the first die;
• a second bonding pad on the first surface of the first die;
• and
• a conductive feature electrically shorting the first and the second bonding pads;
• a third bonding pad and a fourth bonding pad on a first surface of the second die, wherein the third and the fourth bonding pads are bonded to the first and the second bonding pads of the first die, respectively;
• a first and a second through-silicon via in the second die;
• and
• a fifth and a sixth bonding pad on a second surface opposite the first surface of the second die, wherein the third and the fifth bonding pads are electrically connected through the first through-silicon via, and the fourth and the sixth bonding pads are electrically shorted through the second through-silicon via.