US 7,598,161 B2Granted

Method of forming transistor devices with different threshold voltages using halo implant shadowing

AssigneeAdvanced Micro Devices, Inc.

InventorsJingrong Zhou, Mark Michael, David Wu, James F. Buller, Akif Sultan

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Abstract

The halo implant technique described herein employs a halo implant mask that creates a halo implant shadowing effect during halo dopant bombardment. A first transistor device structure and a second transistor device structure are formed on a wafer such that they are orthogonally oriented to each other. A common halo implant mask is created with features that prevent halo implantation of the diffusion region of the second transistor device structure during halo implantation of the diffusion region of the first transistor device structure, and with features that prevent halo implantation of the diffusion region of the first transistor device structure during halo implantation of the diffusion region of the second transistor device structure. The orthogonal orientation of the transistor device structures and the pattern of the halo implant mask obviates the need to create multiple implant masks to achieve different threshold voltages for the transistor device structures.

Claims16

Dependent claims

A halo implant method for semiconductor devices, the method comprising:

forming a first device structure on a semiconductor substrate, the first device structure comprising a first diffusion region that represents source and drain regions and a gate channel of the first device structure, and the first device structure comprising a first gate structure over the first diffusion region, the first gate structure being oriented in a first direction relative to a reference direction;
forming a second device structure on the semiconductor substrate, the second device structure comprising a second diffusion region that represents source and drain regions and a gate channel of the second device structure, and the second device structure comprising a second gate structure over the second diffusion region, the second gate structure being oriented in a second direction relative to the reference direction;
forming an implant mask that selectively masks portions of the first device structure while leaving the first diffusion region substantially exposed, and that selectively masks portions of the second device structure while leaving the second diffusion region substantially exposed;
halo implanting the first diffusion region using a first ion bombardment oriented in a first tilted direction, the implant mask shadowing the second diffusion region from the first ion bombardment;
and
halo implanting the second diffusion region using a second ion bombardment oriented in a second tilted direction, the implant mask shadowing the first diffusion region from the second ion bombardment.

3 more elements

A method of forming semiconductor transistor devices, the method comprising:

providing a semiconductor wafer having formed thereon a first transistor device structure comprising a first diffusion region that represents source and drain regions and a gate channel of the first transistor device structure, and a second transistor device structure comprising a second diffusion region that represents source and drain regions and a gate channel of the second transistor device structure;
forming an implant mask over selective portions of the first transistor device structure and over selective portions of the second transistor device structure, such that the first diffusion region and the source and drain regions of the first transistor device structure are fully exposed and become susceptible to halo implanting using ion bombardment oriented in a first tilted direction and immune to halo implanting using ion bombardment oriented in a second tilted direction, and such that the second diffusion region and the source and drain regions of the second transistor device structure are fully exposed and become susceptible to halo implanting using ion bombardment oriented in the second tilted direction and immune to halo implanting using ion bombardment oriented in the first tilted direction;
halo implanting the first diffusion region using ion bombardment oriented in the first tilted direction;
and
halo implanting the second diffusion region using ion bombardment oriented in the second tilted direction.

2 more elements

A halo implant method for a semiconductor wafer having formed thereon a first device structure comprising a first diffusion region that represents source and drain regions of the first device structure, and a second device structure comprising a second diffusion region that represents source and drain regions of the second device structure, the first device structure and the second device structure being oriented in different directions, the method comprising:

forming an implant mask over selective portions of the first device structure and over selective portions of the second device structure, such that the first diffusion region and the second diffusion region remain substantially exposed;
halo implanting the source region of the first diffusion region, without halo implanting the second diffusion region, using a first ion bombardment oriented in a first tilted direction that has a first projected direction on the semiconductor wafer, the implant mask protecting the second diffusion region from the first ion bombardment;
halo implanting the source region of the second diffusion region, without halo implanting the first diffusion region, using a second ion bombardment oriented in a second tilted direction that has a second projected direction on the semiconductor wafer, the implant mask protecting the first diffusion region from the second ion bombardment;
halo implanting the drain region of the first diffusion region, without halo implanting the second diffusion region, using a third ion bombardment oriented in a third tilted direction that has a third projected direction on the semiconductor wafer, the implant mask protecting the second diffusion region from the third ion bombardment;
and
halo implanting the drain region of the second diffusion region, without halo implanting the first diffusion region, using a fourth ion bombardment oriented in a fourth tilted direction that has a fourth projected direction on the semiconductor wafer, the implant mask protecting the first diffusion region from the fourth ion bombardment;
wherein
the first projected direction and the third projected direction are anti-parallel, the second projected direction and the fourth projected direction are anti-parallel, the first projected direction is orthogonal to both the second projected direction and the fourth projected direction, and the third projected direction is orthogonal to both the second projected direction and the fourth projected direction.

5 more elements

Dependencies are inferred from the claim text.

Facts

Application: 11/861,534Filed 26 Sep 2007
Published: US 2009/0081860 A126 Mar 2009
Granted: 6 Oct 2009
Term ends: Not estimatedThe source records don’t support an estimate.

Classification9 codes

H10P 30/21
Into semiconductor materials, e.g. for doping: of electrically active species
H10D 62/371
Of igfets: inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
H10D 84/0167
The components including complementary IGFETs, e.g. CMOS devices: manufacturing their channels
H10D 84/038
Using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology: using silicon technology, e.g. SiGe