Method for reducing layout-dependent variations in semiconductor devices
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsChung-Heng Yang, Yi-Ming Sheu, Sheng-Jier Yang
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Abstract
A method for forming an integrated circuit includes providing a semiconductor substrate, forming a re-implantation blocking layer over the semiconductor substrate, forming a mask over the re-implantation blocking layer, patterning the mask to form an opening, wherein a portion of the re-implantation blocking layer is exposed through the opening, performing an implantation to introduce an impurity into a portion of the semiconductor substrate underlying the opening to form a well region, removing the mask, and removing the re-implantation blocking layer.
Claims19
A method for forming an integrated circuit, the method comprising:
- providing a semiconductor substrate;
- forming a re-implantation blocking layer over the semiconductor substrate;
- forming a mask over the re-implantation blocking layer;
- patterning the mask to form an opening, wherein a portion of the re-implantation blocking layer is exposed through the opening;
- performing an implantation to introduce an impurity into a portion of the semiconductor substrate underlying the opening to form a well region;
- removing the mask;
- and
- removing the re-implantation blocking layer.
A method for forming an integrated circuit, the method comprising:
- providing a semiconductor substrate;
- forming a sacrificial layer over the semiconductor substrate;
- forming a re-implantation blocking layer over the sacrificial layer;
- forming a photoresist over the re-implantation blocking layer;
- patterning the photoresist to form an opening, wherein a portion of the re-implantation blocking layer is exposed through the opening;
- performing an implantation to introduce an impurity into a portion of the semiconductor substrate underlying the opening to form a well region;
- removing the photoresist;
- removing the re-implantation blocking layer;
- performing a well annealing;
- removing the sacrificial layer;
- forming a gate dielectric layer on the semiconductor substrate after the step of removing the sacrificial layer;
- and
- forming a gate electrode layer on the gate dielectric layer.
A method for forming an integrated circuit, the method comprising:
- providing a semiconductor substrate;
- forming a sacrificial layer over the semiconductor substrate;
- forming a first bottom anti-reflective coating (BARC) over the sacrificial layer;
- forming a first photoresist over the first BARC;
- patterning the first photoresist to form a first opening, wherein a portion of a top surface of the first BARC is exposed through the first opening;
- performing a first implantation to introduce an impurity into a portion of the semiconductor substrate underlying the first opening to form a first well region;
- removing the photoresist;
- removing the first BARC;
- forming a second BARC over the sacrificial layer;
- forming a second photoresist over the second BARC;
- patterning the second photoresist to form a second opening, wherein a portion of a top surface of the second BARC is exposed through the second opening;
- performing a second implantation to introduce an impurity into a portion of the semiconductor substrate underlying the additional opening to form an additional well region;
- removing the second photoresist;
- removing the second BARC;
- performing a well annealing;
- removing the sacrificial layer;
- forming a gate dielectric layer on the semiconductor substrate;
- and
- forming a gate electrode layer on the gate dielectric layer.
Dependencies are inferred from the claim text.