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US 7,598,110 B2Granted
CMOS image sensor and method for manufacturing the same
AssigneeDongbu HiTek Co., Ltd.
InventorJea-Hee Kim
Life of this patent
Estimating the term…
Abstract
A method for manufacturing a CMOS image sensor may include at least one of the following steps: Forming a salicide blocking layer on an entire surface of a semiconductor substrate having a photodiode area and a transistor. Forming a photoresist pattern inclined at an angle less 90° (e.g. between approximately 70° and approximately 80°) on and/or over a non-salicide area. Performing wet-etching on the salicide blocking layer using the photoresist pattern as an etching mask. Forming salicide on the salicide area after removing the photoresist pattern.
Claims16
A method comprising:
- forming a photodiode, a source/drain area, and a gate electrode over a semiconductor substrate;
- forming a salicide blocking layer over the photodiode, the source/drain area, and the gate electrode;
- forming a photoresist pattern over the salicide blocking layer, wherein a border of the photoresist pattern has an inclination angle less than 90° over the gate electrode and the photoresist pattern is formed over the photodiode;
- etching the salicide blocking layer using the photoresist pattern as an etch mask;
- and
- forming salicide on the source/drain area and the gate electrodes,
- wherein said etching is wet-etching,
- wherein said wet-etching comprises:
- etching the salicide blocking layer while rotating the semiconductor substrate in a first direction;
- and
- etching the semiconductor substrate while rotating the semiconductor substrate in a second direction, wherein the second direction is opposite to the first direction.
8 more elements
An apparatus comprising:
- a semiconductor substrate over which a photodiode, a source/drain area, and a gate electrode are formed;
- a salicide blocking layer over formed the photodiode, the source/drain area, and the gate electrode;
- and
- a photoresist pattern formed over the salicide blocking layer, wherein a border of the photoresist pattern which exposes a portion of the salicide blocking layer has an inclination angle less than 90° over the gate electrode,
- wherein the salicide blocking layer is etched by wet-etching which comprises:
- etching the salicide blocking layer while rotating the semiconductor substrate in a first direction;
- and
- etching the semiconductor substrate while rotating the semiconductor substrate in a second direction, wherein the second direction is opposite to the first direction.
5 more elements
A method comprising:
- forming a photodiode, a source/drain area, and a gate electrode over a semiconductor substrate;
- forming a salicide blocking layer over the photodiode, the source/drain area, and the gate electrode;
- forming a photoresist pattern over the salicide blocking layer;
- etching the silicide blocking layer using the photoresist pattern as an etch mask while rotating the semiconductor substrate in a first direction;
- etching the semiconductor substrate while rotating the semiconductor substrate in a second direction opposite to the first direction;
- and
- forming salicide on the source/drain area and the gate electrode.
4 more elements
Dependencies are inferred from the claim text.