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US 7,590,796 B2Granted
System and method for power management in memory systems
AssigneeMetaram, Inc.
InventorsSuresh Natarajan Rajan, Keith R. Schakel, Michael John Sebastian Smith, David T. Wang, Frederick Daniel Weber
Life of this patent
Estimating the term…
Abstract
A memory circuit power management system and method are provided. In use, an interface circuit is in communication with a plurality of physical memory circuits and a system. The interface circuit is operable to interface the physical memory circuits and the system for simulating at least one virtual memory circuit with a first power behavior that is different from a second power behavior of the physical memory circuits.
Claims20
A sub-system, comprising:
- an interface circuit in communication with a plurality of physical memory circuits and a system, the interface circuit operable to interface the physical memory circuits and the system for simulating at least one virtual memory circuit with a first power behavior that is different from a second power behavior of the physical memory circuits.
A method, comprising:
- interfacing a plurality of physical memory circuits and a system;
- and
- simulating at least one virtual memory circuit with a first power behavior that is different from a second power behavior of the physical memory circuits.
A system, comprising:
- a plurality of physical memory circuits;
- and
- an interface circuit in communication with the physical memory circuits, the interface circuit operable to interface the physical memory circuits for simulating at least one virtual memory circuit with a first power behavior that is different from a second power behavior of the physical memory circuits.
Dependencies are inferred from the claim text.