Clock domain conflict analysis for timing graphs

A computer system for clock domain conflict analysis, said system comprising:

• a processor;
• a memory in data communication with said process, said memory including,
• a first set of computer-readable instructions to generate a timing graph having a source instance, a destination instance and a plurality of edges defining a plurality of signal paths between said source instance and said destination instance,
• a second set of computer-readable instructions to map a plurality of clock domains to said timing graph, with a subset of said plurality of edges being associated with more than one clock domain and with one of said plurality of paths,
• a third set of computer-readable instructions to identify, from said subset, a conflict, said conflict including clock domains associated with a common edge and having differing timing requirements;
• and
• a fourth set of computer-readable instructions to dissociate one of said clock domains from one of the edges of said subset having said conflict by removing edge masks associated with the clock domain for the edge in response to identification of a conflict, the dissociation resulting in the source and the destination instances being uniquely related by a single timing exception thereby resolving clock domain conflict.

A computer-readable medium including computer-readable instructions, which when executed by a computer, are for performing clock domain analysis, said computer-readable medium comprising:

• code to generate a timing graph having a source instance, a destination instance and a plurality of edges defining a plurality of signal paths between said source instance and said destination instance;
• code to map a plurality of clock domains to said timing graph, with a subset of said plurality of edges being associated with more than one clock domain and with one of said plurality of paths;
• code to identify, from said subset, a conflict, said conflict including clock domains associated with a common edge and having differing timing requirements;
• and
• code to dissociate one of said clock domains from one of the edges of said subset having said conflict by removing edge masks associated with the clock domain for the edge in response to identification of a conflict, the dissociation resulting in the source and destination instances being uniquely related by a single timing exception thereby resolving clock domain conflict.