Method and system for tuning a circuit

A computer program product for tuning a circuit, comprising a medium storing computer programs code for execution by one or more computer systems, the computer program product comprising:

• code for receiving a description of the circuit;
• code for selecting a design point of the circuit for evaluation using a sizing tool, wherein the design point comprises a design of the circuit that meets a set of predefined design specifications, and wherein the circuit comprises a group of circuit devices;
• code for receiving a set of tuning information for the group of circuit devices, wherein the set of tuning information includes tuning ranges and corresponding increments applicable within the tuning ranges;
• code for tuning the group of circuit devices using the set of tuning information to create a group of tuned circuit devices;
• code for creating an updated layout of the group of tuned circuit devices using a layout tool;
• code for creating estimated parasitic information of the group of tuned circuit devices using the updated layout;
• and
• code for verifying the design point meets design goals of the circuit using the estimated parasitic information of the updated layout.

A system for tuning a circuit, comprising:

• at least one processing unit for executing computer programs;
• a graphical-user-interface for viewing representations of the circuit on a display;
• a memory for storing information of the circuit;
• logic for receiving a description of the circuit;
• logic for selecting a design point of the circuit for evaluation using a sizing tool, wherein the design point comprises a design of the circuit that meets a set of predefined design specifications, and wherein the circuit comprises a group of circuit devices;
• logic for receiving a set of tuning information for the group of circuit devices, wherein the set of tuning information includes tuning ranges and corresponding increments applicable within the tuning ranges;
• logic for tuning the group of circuit devices using the set of tuning information to create a group of tuned circuit devices;
• logic for creating an updated layout of the group of tuned circuit devices using a layout tool;
• logic for creating estimated parasitic information of the group of tuned circuit devices using the updated layout;
• and
• logic for verifying the design point meets design goals of the circuit using the estimated parasitic information of the updated layout.