Edge incremental redundancy memory structure and memory management

A method for servicing Incremental Redundancy (IR) operations in a wireless receiver including an IR module and system processing circuitry that is operable to execute a substantial portion of Physical (PHY) layer operations and a substantial portion of Media Access Control (MAC) layer operations of the wireless receiver, the method comprising:

• performing, by the system processing circuitry, PHY layer operations including:
• receiving an input signal corresponding to a data block;
• and
• processing the input signal to produce soft decision bits of the data block;
• initiating, by the system processing circuitry, IR operations for the soft decision bits of the data block;
• and
• performing, by the IR module, IR operations on the soft decision bits of the data block, including:
• decoding the soft decision bits of the data block;
• failing to correctly decode the data block;
• storing IR status information regarding the data block in Type I IR memory;
• allocating Type II IR memory for the data block;
• storing an address of the allocated Type II IR memory in Type I IR memory;
• and
• storing at least a portion of the soft decision bits of the data block in the allocated Type II IR memory.

A wireless terminal comprising:

• a wireless interface operable to receive a wireless signal and to produce an input signal;
• and
• wireless device processing circuitry coupled to the wireless interface and operable to implement Incremental Redundancy (IR) operations of a wireless device, the wireless device processing circuitry comprising:
• system processing circuitry operable to receive an input signal corresponding to a data block, to process the input signal to produce soft decision bits of the data block, and to initiate IR operations, the system processing circuitry operable to perform a substantial portion of Physical (PHY) layer operations and Media Access Control (MAC) layer operations of the wireless device, to investigate whether IR operations are required for the soft decision bits of the data block, and to initiate IR operations based upon the investigation;
• at least one IR processing module that is operable to perform IR operations on the soft decision bits of the data block based upon a direction from the system processing circuitry;
• and
• IR memory coupled to the IR processing function and to the system processing resources, the IR memory including Type I IR memory adapted to store IR status information of the data block and Type II IR memory adapted to store the data block.