Microprocessor comprising error detection means protected against an attack by error injection

An integrated circuit comprising:

• a central processing unit for executing a program comprising instruction codes;
• and
• means for monitoring an execution of at least one sequence of instruction codes in the program, the sequence comprising at least one instruction code, the monitoring means comprising:
• a signature calculation circuit for producing current cumulative signatures that vary according to logic signals of the integrated circuit, the signature calculation circuit supplying, at an end of the execution of the sequence, a final cumulative signature;
• means for storing an expected signature prior to execution of the sequence of instruction codes;
• a timer for measuring a time interval;
• means for producing an error signal having an active value by default as soon as the execution of the sequence starts, and remaining on the active value while the current cumulative signature is different to the expected signature;
• and
• means for masking the error signal during the measurement of the time interval by the timer, and unconditionally lifting the error signal when the time interval expires.

A computer-readable memory medium containing a sequence of instructions for controlling an integrated circuit, the sequence including instructions for causing the integrated circuit to:

• store an expected final cumulative signature associated with a secured sequence of instructions in the sequence of instructions;
• store a value corresponding to an expected duration of an execution of the secured sequence of instructions;
• and
• subsequently execute the secured sequence of instructions.

An integrated circuit, comprising:

• a processor for executing a sequence of instruction codes;
• a memory to store a known signature associated with a secured sequence of instruction codes in the sequence of instruction codes;
• a signature production module configured to produce cumulative signatures during the execution of the sequence of instructions;
• an error detector coupled to the signature production module and configured to generate an error signal when a current cumulative signature is different from the known signature;
• and
• an error masking module configured to mask the error signal generated by the error detector when the current cumulative signature is expected to be different from the known signature.

A method of detecting error injection during execution of a sequence of instruction codes by an integrated circuit, comprising:

• masking an error signal;
• activating the error signal;
• executing the sequence of instruction codes;
• generating a cumulative signature during execution of the sequence of instruction codes;
• deactivating the error signal when a cumulative signature is equal to a known final cumulative signature;
• and
• lifting the mask when the cumulative signature is expected to be equal to the known final cumulative signature.

A system comprising:

• a smart card;
• and
• an electronic device coupled to the smart card, wherein the system includes an integrated circuit, the integrated circuit comprising:
• a processor for executing a sequence of instruction codes;
• a memory to store a known signature associated with a secured sequence of instructions in the sequence of instruction codes;
• a signature production module configured to produce a current cumulative signature during execution of the secured sequence of instructions;
• an error detection module coupled to the signature production module and configured to produce an error signal based on a comparison of the current cumulative signature with the known signature;
• and
• an error masking module coupled to the error detection module and configured to mask the error signal until the cumulative signature is expected to be equal to the known signature.

An integrated circuit, comprising:

• means for executing a sequence of instructions;
• means for producing a current cumulative signature during execution of the sequence of instructions;
• means for comparing the current cumulative signature with an expected signature, the expected signature being known prior to execution of the sequence of instructions;
• and
• means for masking an output of the means for comparing the current cumulative signature with the expected signature.