Method and apparatus for supporting different modes of multi-threaded speculative execution
AssigneeSun Microsystems, Inc.
InventorsShailender Chaudhry, Marc Tremblay, Paul Caprioli
Life of this patent
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Abstract
One embodiment of the present invention provides a system that supports different modes of multi-threaded speculative execution on a processor. The system starts with two or more threads executing in a first multi-threaded speculative-execution mode. The system then switches to a second multi-threaded speculative-execution mode by configuring circuits in the processor to enable a second multi-threaded speculative-execution mode. After configuring the circuits, the system next switches the threads from executing in the first multi-threaded speculative-execution mode to executing in the second multi-threaded speculative-execution mode.
Claims18
A method for supporting different modes of multi-threaded speculative execution on a processor, comprising:
- executing two or more threads in a first multi-threaded speculative-execution mode;
- switching to a second multi-threaded speculative-execution mode by configuring circuits in the processor to enable the second multi-threaded speculative-execution mode;
- and
- switching the threads from executing in the first multi-threaded speculative-execution mode to executing in the second multi-threaded speculative-execution mode;
- wherein configuring the circuits involves configuring a per-register status indicator array to enable the per-register status indicator array to store status information for the second multi-threaded speculative-execution mode.
An apparatus for supporting different modes of multi-threaded speculative execution on a processor, comprising:
- a plurality of threads within the processor configured to execute in a first multi-threaded speculative-execution mode;
- and
- a switching mechanism within the processor configured to switch the threads to a second multi-threaded speculative-execution mode by configuring circuits in the processor to enable the second multi-threaded speculative-execution mode and by switching the threads from executing in the first multi-threaded speculative-execution mode to executing in the second multi-threaded speculative-execution mode;
- wherein the switching mechanism configures circuits by configuring a per-register status indicator array to enable the per-register status indicator array to store status information for the second multi-threaded speculative-execution mode.
A computer system for supporting different modes of multi-threaded speculative execution on a processor, comprising:
- the processor;
- a memory coupled to the processor, wherein the memory stores data and instructions for the processor;
- a plurality of threads within the processor configured to execute in a first multi-threaded speculative-execution mode;
- and
- a switching mechanism within the processor configured to switch the threads to a second multi-threaded speculative-execution mode by configuring circuits in the processor to enable the second multi-threaded speculative-execution mode and by switching the threads from executing in the first multi-threaded speculative-execution mode to executing in the second multi-threaded speculative-execution mode;
- wherein the switching mechanism configures circuits by configuring a per-register status indicator array to enable the per-register status indicator array to store status information for the second multi-threaded speculative-execution mode.
Dependencies are inferred from the claim text.