Data reading circuit
AssigneeRealtek Semiconductor Corp.
InventorTung-Chen Kuo
Life of this patent
Estimating the term…
Abstract
Disclosed is a data reading circuit, including: a first register, for receiving a first data signal and generating a second data signal by sampling the first data signal via the first edge of a first predetermined signal; a second register, for sampling a second data signal by the second edge of a second predetermined signal to generate a third data signal; a first selector, for selecting one of the second and third data signals as a fourth data signal according to the phase difference between the first and second predetermined signals; a second selector, for selecting one of the fourth and a fifth data signals as a sixth data signal according to a selecting signal; and a third register, for sampling the sixth data signal to form the fifth data signal according to the first edge of the second predetermined signal.
Claims18
A data reading circuit, comprising:
- a first register, for receiving a first data signal and for sampling the first data signal according to the first edges of a first predetermined signal to generate a second data signal;
- a second register, coupled to the first register, for sampling the second data signal according to the second edges of a second predetermined signal to generate a third data signal;
- a first selector, coupled to the second register, for selecting one of the second and third data signals as a fourth data signal according to the phases of the first and second predetermined signals;
- a second selector, coupled to the first selector, for selecting one of the fourth and a fifth data signals as a sixth data signal according to an enable signal;
- and
- a third register, coupled to the second selector, for sampling the sixth data signal according to the first edges of the second predetermined signal to generate the fifth data signal.
A data reading method, comprising:
- receiving a first data signal
- sampling the first data signal according to the first edges of a first predetermined signal to generate a second data signal;
- sampling the second data signal according to the second edges of a second predetermined signal to generate a third data signal;
- determining if the phase error of the first predetermined signal and the second predetermined signal is larger than a predetermined value, if yes, selecting the second signal as the fourth data signal, if no, selecting the third signal as the fourth data signal;
- and
- sampling the fourth data signal with the second predetermined signal to obtain a correct data signal.
Dependencies are inferred from the claim text.