Charge loss restoration method and semiconductor memory device
AssigneeFujitsu Microelectronics Limited
InventorsOsamu Iioka, Naoto Emi
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Abstract
A charge loss restoration method detects a memory cell having a tendency of a charge loss within a memory cell array of an electrically writable and erasable nonvolatile semiconductor memory device, using a charge loss detecting reference cell having a threshold value set between a threshold value of a read reference cell and a threshold value of a write verify reference cell, where the threshold value of the write verify reference cell is higher than the threshold value of the read reference cell, and restores the memory cell having the tendency of the charge loss by making an additional write thereto.
Claims17
A charge loss restoration method comprising:
- a detection step detecting a memory cell having a tendency of a charge loss within a memory cell array of an electrically writable and erasable nonvolatile semiconductor memory device, using a charge loss detecting reference cell having a threshold value set between a threshold value of a read reference cell and a threshold value of a write verify reference cell, said threshold value of the write verify reference cell being higher than the threshold value of the read reference cell;
- and
- a restoration step restoring the memory cell having the tendency of the charge loss by making an additional write thereto.
An electrically writable and erasable non-volatile semiconductor memory device comprising:
- a memory cell array having a plurality of memory cells;
- a charge loss detecting reference cell having a threshold value set between a threshold value of a read reference cell and a threshold value of a write verify reference cell, said threshold value of the write verify reference cell being higher than the threshold value of the read reference cell;
- a detection circuit configured to detect a memory cell having a tendency of a charge loss within the memory cell array using the read reference cell and the charge loss detecting reference cell;
- and
- a restoration circuit configured to restore the memory cell that is detected by said detection circuit as having the tendency of the charge loss, by making an additional write thereto.
Dependencies are inferred from the claim text.